GNU Linux-libre 6.1.90-gnu
[releases.git] / Documentation / devicetree / bindings / dma / renesas,rcar-dmac.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Renesas R-Car and RZ/G DMA Controller
8
9 maintainers:
10   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12 allOf:
13   - $ref: "dma-controller.yaml#"
14
15 properties:
16   compatible:
17     oneOf:
18       - items:
19           - enum:
20               - renesas,dmac-r8a7742  # RZ/G1H
21               - renesas,dmac-r8a7743  # RZ/G1M
22               - renesas,dmac-r8a7744  # RZ/G1N
23               - renesas,dmac-r8a7745  # RZ/G1E
24               - renesas,dmac-r8a77470 # RZ/G1C
25               - renesas,dmac-r8a774a1 # RZ/G2M
26               - renesas,dmac-r8a774b1 # RZ/G2N
27               - renesas,dmac-r8a774c0 # RZ/G2E
28               - renesas,dmac-r8a774e1 # RZ/G2H
29               - renesas,dmac-r8a7790  # R-Car H2
30               - renesas,dmac-r8a7791  # R-Car M2-W
31               - renesas,dmac-r8a7792  # R-Car V2H
32               - renesas,dmac-r8a7793  # R-Car M2-N
33               - renesas,dmac-r8a7794  # R-Car E2
34               - renesas,dmac-r8a7795  # R-Car H3
35               - renesas,dmac-r8a7796  # R-Car M3-W
36               - renesas,dmac-r8a77961 # R-Car M3-W+
37               - renesas,dmac-r8a77965 # R-Car M3-N
38               - renesas,dmac-r8a77970 # R-Car V3M
39               - renesas,dmac-r8a77980 # R-Car V3H
40               - renesas,dmac-r8a77990 # R-Car E3
41               - renesas,dmac-r8a77995 # R-Car D3
42           - const: renesas,rcar-dmac
43
44       - items:
45           - enum:
46               - renesas,dmac-r8a779a0     # R-Car V3U
47               - renesas,dmac-r8a779f0     # R-Car S4-8
48               - renesas,dmac-r8a779g0     # R-Car V4H
49           - const: renesas,rcar-gen4-dmac # R-Car Gen4
50
51   reg: true
52
53   interrupts:
54     minItems: 9
55     maxItems: 17
56
57   interrupt-names:
58     minItems: 9
59     items:
60       - const: error
61       - pattern: "^ch([0-9]|1[0-5])$"
62       - pattern: "^ch([0-9]|1[0-5])$"
63       - pattern: "^ch([0-9]|1[0-5])$"
64       - pattern: "^ch([0-9]|1[0-5])$"
65       - pattern: "^ch([0-9]|1[0-5])$"
66       - pattern: "^ch([0-9]|1[0-5])$"
67       - pattern: "^ch([0-9]|1[0-5])$"
68       - pattern: "^ch([0-9]|1[0-5])$"
69       - pattern: "^ch([0-9]|1[0-5])$"
70       - pattern: "^ch([0-9]|1[0-5])$"
71       - pattern: "^ch([0-9]|1[0-5])$"
72       - pattern: "^ch([0-9]|1[0-5])$"
73       - pattern: "^ch([0-9]|1[0-5])$"
74       - pattern: "^ch([0-9]|1[0-5])$"
75       - pattern: "^ch([0-9]|1[0-5])$"
76       - pattern: "^ch([0-9]|1[0-5])$"
77
78   clocks:
79     maxItems: 1
80
81   clock-names:
82     items:
83       - const: fck
84
85   '#dma-cells':
86     const: 1
87     description:
88       The cell specifies the MID/RID of the DMAC port connected to
89       the DMA client.
90
91   dma-channels:
92     minimum: 8
93     maximum: 16
94
95   dma-channel-mask: true
96
97   iommus:
98     minItems: 8
99     maxItems: 16
100
101   power-domains:
102     maxItems: 1
103
104   resets:
105     maxItems: 1
106
107 required:
108   - compatible
109   - reg
110   - interrupts
111   - interrupt-names
112   - clocks
113   - clock-names
114   - '#dma-cells'
115   - dma-channels
116   - power-domains
117   - resets
118
119 if:
120   properties:
121     compatible:
122       contains:
123         enum:
124           - renesas,rcar-gen4-dmac
125 then:
126   properties:
127     reg:
128       items:
129         - description: Base register block
130         - description: Channel register block
131 else:
132   properties:
133     reg:
134       maxItems: 1
135
136 additionalProperties: false
137
138 examples:
139   - |
140     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
141     #include <dt-bindings/interrupt-controller/arm-gic.h>
142     #include <dt-bindings/power/r8a7790-sysc.h>
143
144     dmac0: dma-controller@e6700000 {
145         compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
146         reg = <0xe6700000 0x20000>;
147         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
148                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
149                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
150                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
151                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
152                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
153                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
154                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
155                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
156                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
157                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
158                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
159                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
160                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
161                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
162                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
163         interrupt-names = "error",
164                           "ch0", "ch1", "ch2", "ch3",
165                           "ch4", "ch5", "ch6", "ch7",
166                           "ch8", "ch9", "ch10", "ch11",
167                           "ch12", "ch13", "ch14";
168         clocks = <&cpg CPG_MOD 219>;
169         clock-names = "fck";
170         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
171         resets = <&cpg 219>;
172         #dma-cells = <1>;
173         dma-channels = <15>;
174     };