Documentation/devicetree/bindings/dma/qcom,gpi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies Inc GPI DMA controller
   8
   9 maintainers:
  10   - Vinod Koul <vkoul@kernel.org>
  11
  12 description: |
  13   QCOM GPI DMA controller provides DMA capabilities for
  14   peripheral buses such as I2C, UART, and SPI.
  15
  16 allOf:
  17   - $ref: "dma-controller.yaml#"
  18
  19 properties:
  20   compatible:
  21     enum:
  22       - qcom,sc7280-gpi-dma
  23       - qcom,sdm845-gpi-dma
  24       - qcom,sm6350-gpi-dma
  25       - qcom,sm8150-gpi-dma
  26       - qcom,sm8250-gpi-dma
  27       - qcom,sm8350-gpi-dma
  28       - qcom,sm8450-gpi-dma
  29
  30   reg:
  31     maxItems: 1
  32
  33   interrupts:
  34     description:
  35       Interrupt lines for each GPI instance
  36     minItems: 1
  37     maxItems: 13
  38
  39   "#dma-cells":
  40     const: 3
  41     description: >
  42       DMA clients must use the format described in dma.txt, giving a phandle
  43       to the DMA controller plus the following 3 integer cells:
  44       - channel: if set to 0xffffffff, any available channel will be allocated
  45         for the client. Otherwise, the exact channel specified will be used.
  46       - seid: serial id of the client as defined in the SoC documentation.
  47       - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
  48
  49   iommus:
  50     maxItems: 1
  51
  52   dma-channels:
  53     maximum: 31
  54
  55   dma-channel-mask:
  56     maxItems: 1
  57
  58 required:
  59   - compatible
  60   - reg
  61   - interrupts
  62   - "#dma-cells"
  63   - iommus
  64   - dma-channels
  65   - dma-channel-mask
  66
  67 additionalProperties: false
  68
  69 examples:
  70   - |
  71     #include <dt-bindings/interrupt-controller/arm-gic.h>
  72     #include <dt-bindings/dma/qcom-gpi.h>
  73     gpi_dma0: dma-controller@800000 {
  74         compatible = "qcom,sdm845-gpi-dma";
  75         #dma-cells = <3>;
  76         reg = <0x00800000 0x60000>;
  77         iommus = <&apps_smmu 0x0016 0x0>;
  78         dma-channels = <13>;
  79         dma-channel-mask = <0xfa>;
  80         interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
  81                      <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
  82                      <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
  83                      <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
  84                      <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
  85                      <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
  86                      <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
  87                      <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
  88                      <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
  89                      <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
  90                      <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
  91                      <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
  92                      <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
  93     };
  94
  95 ...