1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/dma/altr,msgdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera mSGDMA IP core
10 - Olivier Dautricourt <olivierdautricourt@gmail.com>
13 Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA)
14 intellectual property (IP)
17 - $ref: "dma-controller.yaml#"
21 const: altr,socfpga-msgdma
25 - description: Control and Status Register Slave Port
26 - description: Descriptor Slave Port
27 - description: Response Slave Port (Optional)
43 The cell identifies the channel id (must be 0)
51 unevaluatedProperties: false
55 #include <dt-bindings/interrupt-controller/irq.h>
57 msgdma_controller: dma-controller@ff200b00 {
58 compatible = "altr,socfpga-msgdma";
59 reg = <0xff200b00 0x100>, <0xff200c00 0x100>, <0xff200d00 0x100>;
60 reg-names = "csr", "desc", "resp";
61 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;