Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Display DSI 14nm PHY
   8
   9 maintainers:
  10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
  11
  12 allOf:
  13   - $ref: dsi-phy-common.yaml#
  14
  15 properties:
  16   compatible:
  17     enum:
  18       - qcom,dsi-phy-14nm
  19       - qcom,dsi-phy-14nm-660
  20       - qcom,dsi-phy-14nm-8953
  21
  22   reg:
  23     items:
  24       - description: dsi phy register set
  25       - description: dsi phy lane register set
  26       - description: dsi pll register set
  27
  28   reg-names:
  29     items:
  30       - const: dsi_phy
  31       - const: dsi_phy_lane
  32       - const: dsi_pll
  33
  34   vcca-supply:
  35     description: Phandle to vcca regulator device node.
  36
  37 required:
  38   - compatible
  39   - reg
  40   - reg-names
  41   - vcca-supply
  42
  43 unevaluatedProperties: false
  44
  45 examples:
  46   - |
  47      #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
  48      #include <dt-bindings/clock/qcom,rpmh.h>
  49
  50      dsi-phy@ae94400 {
  51          compatible = "qcom,dsi-phy-14nm";
  52          reg = <0x0ae94400 0x200>,
  53                <0x0ae94600 0x280>,
  54                <0x0ae94a00 0x1e0>;
  55          reg-names = "dsi_phy",
  56                      "dsi_phy_lane",
  57                      "dsi_pll";
  58
  59          #clock-cells = <1>;
  60          #phy-cells = <0>;
  61
  62          vcca-supply = <&vcca_reg>;
  63          clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
  64                   <&rpmhcc RPMH_CXO_CLK>;
  65          clock-names = "iface", "ref";
  66      };
  67 ...