1 Renesas Gen3 DWC HDMI TX Encoder
2 ================================
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
5 with a companion PHY IP.
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
8 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
9 following device-specific properties.
14 - compatible : Shall contain one or more of
15 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
16 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
17 - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
18 - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
20 When compatible with generic versions, nodes must list the SoC-specific
21 version corresponding to the platform first, followed by the
22 family-specific version.
24 - reg: See dw_hdmi.txt.
25 - interrupts: HDMI interrupt number
26 - clocks: See dw_hdmi.txt.
27 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
28 - ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
29 corresponding to the video input of the controller and one port numbered 1
30 corresponding to its HDMI output, and one port numbered 2 corresponding to
31 sound input of the controller. Each port shall have a single endpoint.
35 - power-domains: Shall reference the power domain that contains the DWC HDMI,
41 hdmi0: hdmi@fead0000 {
42 compatible = "renesas,r8a7795-dw-hdmi";
43 reg = <0 0xfead0000 0 0x10000>;
44 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
45 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
46 clock-names = "iahb", "isfr";
47 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
54 dw_hdmi0_in: endpoint {
55 remote-endpoint = <&du_out_hdmi0>;
60 rcar_dw_hdmi0_out: endpoint {
61 remote-endpoint = <&hdmi0_con>;
66 rcar_dw_hdmi0_sound_in: endpoint {
67 remote-endpoint = <&hdmi_sound_out>;
74 compatible = "hdmi-connector";
80 remote-endpoint = <&rcar_dw_hdmi0_out>;