3 This is a display controller found on several development platforms produced
4 by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
5 streamer that reads the data from a framebuffer and sends it to a single
6 digital encoder (DVI or HDMI).
9 - compatible: "arm,hdlcd"
10 - reg: Physical base address and length of the controller's registers.
11 - interrupts: One interrupt used by the display controller to notify the
12 interrupt controller when any of the interrupt sources programmed in
13 the interrupt mask register have activated.
14 - clocks: A list of phandle + clock-specifier pairs, one for each
15 entry in 'clock-names'.
16 - clock-names: A list of clock names. For HDLCD it should contain:
17 - "pxlclk" for the clock feeding the output PLL of the controller.
20 - port: The HDLCD connection to an encoder chip. The connection is modeled
21 using the OF graph bindings specified in
22 Documentation/devicetree/bindings/graph.txt.
25 - memory-region: phandle to a node describing memory (see
26 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be
27 used for the framebuffer; if not present, the framebuffer may be located
37 compatible = "arm,hdlcd";
38 reg = <0 0x2b000000 0 0x1000>;
39 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
41 clock-names = "pxlclk";
43 hdlcd_output: endpoint@0 {
44 remote-endpoint = <&hdmi_enc_input>;
49 /* HDMI encoder on I2C bus */
56 hdmi_enc_input: endpoint {
57 remote-endpoint = <&hdlcd_output>;
60 hdmi_enc_output: endpoint {
61 remote-endpoint = <&hdmi_1_port>;
69 compatible = "hdmi-connector";
72 hdmi_1_port: endpoint {
73 remote-endpoint = <&hdmi_enc_output>;