1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: /schemas/sound/name-prefix.yaml#
17 The Amlogic Meson Synopsys Designware Integration is composed of
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
21 ___________________________________
23 |___________________________________|
25 | Synopsys HDMI | HDMI PHY |=> TMDS
26 | Controller |________________|
27 |___________________________________|<=> DDC
29 The HDMI TOP block only supports HPD sensing.
30 The Synopsys HDMI Controller interrupt is routed through the
32 Communication to the TOP Block and the Synopsys HDMI Controller is done
33 via a pair of dedicated addr+read/write registers.
34 The HDMI PHY is configured by registers in the HHI register block.
36 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
37 selects either the ENCI encoder for the 576i or 480i formats or the ENCP
38 encoder for all the other formats including interlaced HD formats.
40 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
41 DVI timings for the HDMI controller.
43 Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
44 HDMI TX IP version 2.01a with HDCP and I2C & S/PDIF
45 audio source interfaces.
52 - amlogic,meson-gxbb-dw-hdmi # GXBB (S905)
53 - amlogic,meson-gxl-dw-hdmi # GXL (S905X, S905D)
54 - amlogic,meson-gxm-dw-hdmi # GXM (S912)
55 - const: amlogic,meson-gx-dw-hdmi
57 - amlogic,meson-g12a-dw-hdmi # G12A (S905X2, S905Y2, S905D2)
84 description: phandle to an external 5V regulator to power the HDMI logic
89 A port node pointing to the VENC Input port node.
94 A port node pointing to the TMDS Output port node.
105 sound-name-prefix: true
120 additionalProperties: false
124 hdmi_tx: hdmi-tx@c883a000 {
125 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
126 reg = <0xc883a000 0x1c>;
128 resets = <&reset_apb>, <&reset_hdmitx>, <&reset_hdmitx_phy>;
129 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
130 clocks = <&clk_isfr>, <&clk_iahb>, <&clk_venci>;
131 clock-names = "isfr", "iahb", "venci";
132 #address-cells = <1>;
136 hdmi_tx_venc_port: port@0 {
139 hdmi_tx_in: endpoint {
140 remote-endpoint = <&hdmi_tx_out>;
145 hdmi_tx_tmds_port: port@1 {
148 hdmi_tx_tmds_out: endpoint {
149 remote-endpoint = <&hdmi_connector_in>;