1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
26 - const: allwinner,sun6i-a31s-tcon
27 - const: allwinner,sun7i-a20-tcon
28 - const: allwinner,sun8i-a23-tcon
29 - const: allwinner,sun8i-a33-tcon
30 - const: allwinner,sun8i-a83t-tcon-lcd
31 - const: allwinner,sun8i-a83t-tcon-tv
32 - const: allwinner,sun8i-r40-tcon-tv
33 - const: allwinner,sun8i-v3s-tcon
34 - const: allwinner,sun9i-a80-tcon-lcd
35 - const: allwinner,sun9i-a80-tcon-tv
39 - allwinner,sun7i-a20-tcon0
40 - allwinner,sun7i-a20-tcon1
41 - const: allwinner,sun7i-a20-tcon
45 - allwinner,sun50i-a64-tcon-lcd
46 - const: allwinner,sun8i-a83t-tcon-lcd
50 - allwinner,sun8i-h3-tcon-tv
51 - allwinner,sun50i-a64-tcon-tv
52 - const: allwinner,sun8i-a83t-tcon-tv
56 - allwinner,sun50i-h6-tcon-tv
57 - const: allwinner,sun8i-r40-tcon-tv
75 Name of the LCD pixel clock created.
84 - description: TCON Reset Line
87 - description: TCON Reset Line
88 - description: TCON LVDS Reset Line
91 - description: TCON Reset Line
92 - description: TCON eDP Reset Line
95 - description: TCON Reset Line
96 - description: TCON eDP Reset Line
97 - description: TCON LVDS Reset Line
117 $ref: /schemas/graph.yaml#/properties/ports
121 $ref: /schemas/graph.yaml#/properties/port
123 Input endpoints of the controller.
126 $ref: /schemas/graph.yaml#/$defs/port-base
127 unevaluatedProperties: false
129 Output endpoints of the controller.
132 "^endpoint(@[0-9])$":
133 $ref: /schemas/graph.yaml#/$defs/endpoint-base
134 unevaluatedProperties: false
137 allwinner,tcon-channel:
138 $ref: /schemas/types.yaml#/definitions/uint32
140 TCON can have 1 or 2 channels, usually with the
141 first channel being used for the panels interfaces
142 (RGB, LVDS, etc.), and the second being used for the
143 outputs that require another controller (TV Encoder,
146 If that property is present, specifies the TCON
147 channel the endpoint is associated to. If that
148 property is not present, the endpoint number will be
149 used as the channel number.
164 additionalProperties: false
172 - allwinner,sun4i-a10-tcon
173 - allwinner,sun5i-a13-tcon
174 - allwinner,sun7i-a20-tcon
192 - allwinner,sun6i-a31-tcon
193 - allwinner,sun6i-a31s-tcon
212 - allwinner,sun8i-a23-tcon
213 - allwinner,sun8i-a33-tcon
231 - allwinner,sun8i-a83t-tcon-lcd
232 - allwinner,sun8i-v3s-tcon
233 - allwinner,sun9i-a80-tcon-lcd
250 - allwinner,sun8i-a83t-tcon-tv
251 - allwinner,sun8i-r40-tcon-tv
252 - allwinner,sun9i-a80-tcon-tv
269 - allwinner,sun5i-a13-tcon
270 - allwinner,sun6i-a31-tcon
271 - allwinner,sun6i-a31s-tcon
272 - allwinner,sun7i-a20-tcon
273 - allwinner,sun8i-a23-tcon
274 - allwinner,sun8i-a33-tcon
275 - allwinner,sun8i-v3s-tcon
276 - allwinner,sun9i-a80-tcon-lcd
277 - allwinner,sun4i-a10-tcon
278 - allwinner,sun8i-a83t-tcon-lcd
290 - allwinner,sun6i-a31-tcon
291 - allwinner,sun6i-a31s-tcon
292 - allwinner,sun8i-a23-tcon
293 - allwinner,sun8i-a33-tcon
294 - allwinner,sun8i-a83t-tcon-lcd
311 - allwinner,sun9i-a80-tcon-lcd
329 - allwinner,sun9i-a80-tcon-tv
346 - allwinner,sun4i-a10-tcon
347 - allwinner,sun5i-a13-tcon
348 - allwinner,sun6i-a31-tcon
349 - allwinner,sun6i-a31s-tcon
350 - allwinner,sun7i-a20-tcon
351 - allwinner,sun8i-a23-tcon
352 - allwinner,sun8i-a33-tcon
360 #include <dt-bindings/dma/sun4i-a10.h>
363 * This comes from the clock/sun4i-a10-ccu.h and
364 * reset/sun4i-a10-ccu.h headers, but we can't include them since
365 * it would trigger a bunch of warnings for redefinitions of
366 * symbols with the other example.
369 #define CLK_AHB_LCD0 56
370 #define CLK_TCON0_CH0 149
371 #define CLK_TCON0_CH1 155
374 lcd-controller@1c0c000 {
375 compatible = "allwinner,sun4i-a10-tcon";
376 reg = <0x01c0c000 0x1000>;
378 resets = <&ccu RST_TCON0>;
380 clocks = <&ccu CLK_AHB_LCD0>,
381 <&ccu CLK_TCON0_CH0>,
382 <&ccu CLK_TCON0_CH1>;
386 clock-output-names = "tcon0-pixel-clock";
388 dmas = <&dma SUN4I_DMA_DEDICATED 14>;
391 #address-cells = <1>;
395 #address-cells = <1>;
401 remote-endpoint = <&be0_out_tcon0>;
406 remote-endpoint = <&be1_out_tcon0>;
411 #address-cells = <1>;
417 remote-endpoint = <&hdmi_in_tcon0>;
418 allwinner,tcon-channel = <1>;
430 #include <dt-bindings/interrupt-controller/arm-gic.h>
433 * This comes from the clock/sun6i-a31-ccu.h and
434 * reset/sun6i-a31-ccu.h headers, but we can't include them since
435 * it would trigger a bunch of warnings for redefinitions of
436 * symbols with the other example.
439 #define CLK_PLL_MIPI 15
440 #define CLK_AHB1_LCD0 47
441 #define CLK_LCD0_CH0 127
442 #define CLK_LCD0_CH1 129
443 #define RST_AHB1_LCD0 27
444 #define RST_AHB1_LVDS 41
446 lcd-controller@1c0c000 {
447 compatible = "allwinner,sun6i-a31-tcon";
448 reg = <0x01c0c000 0x1000>;
449 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
451 resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
452 reset-names = "lcd", "lvds";
453 clocks = <&ccu CLK_AHB1_LCD0>,
461 clock-output-names = "tcon0-pixel-clock";
465 #address-cells = <1>;
469 #address-cells = <1>;
475 remote-endpoint = <&drc0_out_tcon0>;
480 remote-endpoint = <&drc1_out_tcon0>;
485 #address-cells = <1>;
491 remote-endpoint = <&hdmi_in_tcon0>;
492 allwinner,tcon-channel = <1>;
506 #include <dt-bindings/interrupt-controller/arm-gic.h>
509 * This comes from the clock/sun9i-a80-ccu.h and
510 * reset/sun9i-a80-ccu.h headers, but we can't include them since
511 * it would trigger a bunch of warnings for redefinitions of
512 * symbols with the other example.
515 #define CLK_BUS_LCD0 102
517 #define RST_BUS_LCD0 22
518 #define RST_BUS_EDP 24
519 #define RST_BUS_LVDS 25
521 lcd-controller@3c00000 {
522 compatible = "allwinner,sun9i-a80-tcon-lcd";
523 reg = <0x03c00000 0x10000>;
524 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
526 clock-names = "ahb", "tcon-ch0";
527 resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
528 reset-names = "lcd", "edp", "lvds";
529 clock-output-names = "tcon0-pixel-clock";
533 #address-cells = <1>;
540 remote-endpoint = <&drc0_out_tcon0>;
557 #include <dt-bindings/interrupt-controller/arm-gic.h>
560 * This comes from the clock/sun8i-a83t-ccu.h and
561 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
562 * it would trigger a bunch of warnings for redefinitions of
563 * symbols with the other example.
566 #define CLK_BUS_TCON0 36
568 #define RST_BUS_TCON0 22
569 #define RST_BUS_LVDS 31
571 lcd-controller@1c0c000 {
572 compatible = "allwinner,sun8i-a83t-tcon-lcd";
573 reg = <0x01c0c000 0x1000>;
574 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
575 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
576 clock-names = "ahb", "tcon-ch0";
577 clock-output-names = "tcon-pixel-clock";
579 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
580 reset-names = "lcd", "lvds";
583 #address-cells = <1>;
587 #address-cells = <1>;
593 remote-endpoint = <&mixer0_out_tcon0>;
598 remote-endpoint = <&mixer1_out_tcon0>;
614 #include <dt-bindings/interrupt-controller/arm-gic.h>
617 * This comes from the clock/sun8i-r40-ccu.h and
618 * reset/sun8i-r40-ccu.h headers, but we can't include them since
619 * it would trigger a bunch of warnings for redefinitions of
620 * symbols with the other example.
623 #define CLK_BUS_TCON_TV0 73
624 #define RST_BUS_TCON_TV0 49
626 tcon_tv0: lcd-controller@1c73000 {
627 compatible = "allwinner,sun8i-r40-tcon-tv";
628 reg = <0x01c73000 0x1000>;
629 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
630 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
631 clock-names = "ahb", "tcon-ch1";
632 resets = <&ccu RST_BUS_TCON_TV0>;
636 #address-cells = <1>;
640 #address-cells = <1>;
646 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
651 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
655 tcon_tv0_out: port@1 {
656 #address-cells = <1>;
662 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
668 #undef CLK_BUS_TCON_TV0
669 #undef RST_BUS_TCON_TV0