smb: client: Fix minor whitespace errors and warnings
[linux-modified.git] / Documentation / devicetree / bindings / crypto / qcom-qce.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm crypto engine driver
8
9 maintainers:
10   - Bhupesh Sharma <bhupesh.sharma@linaro.org>
11
12 description:
13   This document defines the binding for the QCE crypto
14   controller found on Qualcomm parts.
15
16 properties:
17   compatible:
18     oneOf:
19       - const: qcom,crypto-v5.1
20         deprecated: true
21         description: Kept only for ABI backward compatibility
22
23       - const: qcom,crypto-v5.4
24         deprecated: true
25         description: Kept only for ABI backward compatibility
26
27       - items:
28           - enum:
29               - qcom,ipq4019-qce
30               - qcom,sm8150-qce
31           - const: qcom,qce
32
33       - items:
34           - enum:
35               - qcom,ipq6018-qce
36               - qcom,ipq8074-qce
37               - qcom,ipq9574-qce
38               - qcom,msm8996-qce
39               - qcom,qcm2290-qce
40               - qcom,sdm845-qce
41               - qcom,sm6115-qce
42           - const: qcom,ipq4019-qce
43           - const: qcom,qce
44
45       - items:
46           - enum:
47               - qcom,sm8250-qce
48               - qcom,sm8350-qce
49               - qcom,sm8450-qce
50               - qcom,sm8550-qce
51           - const: qcom,sm8150-qce
52           - const: qcom,qce
53
54   reg:
55     maxItems: 1
56
57   clocks:
58     minItems: 1
59     maxItems: 3
60
61   clock-names:
62     minItems: 1
63     maxItems: 3
64
65   iommus:
66     minItems: 1
67     maxItems: 8
68     description:
69       phandle to apps_smmu node with sid mask.
70
71   interconnects:
72     maxItems: 1
73     description:
74       Interconnect path between qce crypto and main memory.
75
76   interconnect-names:
77     const: memory
78
79   dmas:
80     items:
81       - description: DMA specifiers for rx dma channel.
82       - description: DMA specifiers for tx dma channel.
83
84   dma-names:
85     items:
86       - const: rx
87       - const: tx
88
89 allOf:
90   - if:
91       properties:
92         compatible:
93           contains:
94             enum:
95               - qcom,crypto-v5.1
96               - qcom,crypto-v5.4
97               - qcom,ipq6018-qce
98               - qcom,ipq8074-qce
99               - qcom,msm8996-qce
100               - qcom,sdm845-qce
101     then:
102       properties:
103         clocks:
104           maxItems: 3
105         clock-names:
106           items:
107             - const: iface
108             - const: bus
109             - const: core
110       required:
111         - clocks
112         - clock-names
113
114   - if:
115       properties:
116         compatible:
117           contains:
118             enum:
119               - qcom,qcm2290-qce
120               - qcom,sm6115-qce
121     then:
122       properties:
123         clocks:
124           maxItems: 1
125         clock-names:
126           items:
127             - const: core
128       required:
129         - clocks
130         - clock-names
131
132 required:
133   - compatible
134   - reg
135   - dmas
136   - dma-names
137
138 additionalProperties: false
139
140 examples:
141   - |
142     #include <dt-bindings/clock/qcom,gcc-apq8084.h>
143     crypto-engine@fd45a000 {
144         compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
145         reg = <0xfd45a000 0x6000>;
146         clocks = <&gcc GCC_CE2_AHB_CLK>,
147                  <&gcc GCC_CE2_AXI_CLK>,
148                  <&gcc GCC_CE2_CLK>;
149         clock-names = "iface", "bus", "core";
150         dmas = <&cryptobam 2>, <&cryptobam 3>;
151         dma-names = "rx", "tx";
152         iommus = <&apps_smmu 0x584 0x0011>,
153                  <&apps_smmu 0x586 0x0011>,
154                  <&apps_smmu 0x594 0x0011>,
155                  <&apps_smmu 0x596 0x0011>;
156     };