arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / Documentation / devicetree / bindings / crypto / aspeed,ast2600-acry.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines
8
9 maintainers:
10   - Neal Liu <neal_liu@aspeedtech.com>
11
12 description:
13   The ACRY ECDSA/RSA engines is designed to accelerate the throughput
14   of ECDSA/RSA signature and verification. Basically, ACRY can be
15   divided into two independent engines - ECC Engine and RSA Engine.
16
17 properties:
18   compatible:
19     enum:
20       - aspeed,ast2600-acry
21
22   reg:
23     items:
24       - description: acry base address & size
25       - description: acry sram base address & size
26
27   clocks:
28     maxItems: 1
29
30   interrupts:
31     maxItems: 1
32
33 required:
34   - compatible
35   - reg
36   - clocks
37   - interrupts
38
39 additionalProperties: false
40
41 examples:
42   - |
43     #include <dt-bindings/clock/ast2600-clock.h>
44     acry: crypto@1e6fa000 {
45         compatible = "aspeed,ast2600-acry";
46         reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
47         interrupts = <160>;
48         clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
49     };