1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Auto v9 SoC clock controller
10 - Chanho Park <chanho61.park@samsung.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
21 The external OSCCLK must be defined as fixed-rate clock in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other clocks of function blocks (other CMUs) are usually
27 Each clock is assigned an identifier and client nodes can use this identifier
28 to specify the clock which they consume. All clocks available for usage
29 in clock consumer nodes are defined as preprocessor macros in
30 'include/dt-bindings/clock/samsung,exynosautov9.h' header.
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-fsys2
39 - samsung,exynosautov9-cmu-peric0
40 - samsung,exynosautov9-cmu-peric1
41 - samsung,exynosautov9-cmu-peris
62 const: samsung,exynosautov9-cmu-top
68 - description: External reference clock (26 MHz)
78 const: samsung,exynosautov9-cmu-busmc
84 - description: External reference clock (26 MHz)
85 - description: CMU_BUSMC bus clock (from CMU_TOP)
90 - const: dout_clkcmu_busmc_bus
96 const: samsung,exynosautov9-cmu-core
102 - description: External reference clock (26 MHz)
103 - description: CMU_CORE bus clock (from CMU_TOP)
108 - const: dout_clkcmu_core_bus
114 const: samsung,exynosautov9-cmu-fsys2
120 - description: External reference clock (26 MHz)
121 - description: CMU_FSYS2 bus clock (from CMU_TOP)
122 - description: UFS clock (from CMU_TOP)
123 - description: Ethernet clock (from CMU_TOP)
128 - const: dout_clkcmu_fsys2_bus
129 - const: dout_fsys2_clkcmu_ufs_embd
130 - const: dout_fsys2_clkcmu_ethernet
136 const: samsung,exynosautov9-cmu-peric0
142 - description: External reference clock (26 MHz)
143 - description: CMU_PERIC0 bus clock (from CMU_TOP)
144 - description: PERIC0 IP clock (from CMU_TOP)
149 - const: dout_clkcmu_peric0_bus
150 - const: dout_clkcmu_peric0_ip
156 const: samsung,exynosautov9-cmu-peric1
162 - description: External reference clock (26 MHz)
163 - description: CMU_PERIC1 bus clock (from CMU_TOP)
164 - description: PERIC1 IP clock (from CMU_TOP)
169 - const: dout_clkcmu_peric1_bus
170 - const: dout_clkcmu_peric1_ip
176 const: samsung,exynosautov9-cmu-peris
182 - description: External reference clock (26 MHz)
183 - description: CMU_PERIS bus clock (from CMU_TOP)
188 - const: dout_clkcmu_peris_bus
197 additionalProperties: false
200 # Clock controller node for CMU_FSYS2
202 #include <dt-bindings/clock/samsung,exynosautov9.h>
204 cmu_fsys2: clock-controller@17c00000 {
205 compatible = "samsung,exynosautov9-cmu-fsys2";
206 reg = <0x17c00000 0x8000>;
210 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
211 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
212 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
213 clock-names = "oscclk",
214 "dout_clkcmu_fsys2_bus",
215 "dout_fsys2_clkcmu_ufs_embd",
216 "dout_fsys2_clkcmu_ethernet";