1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Video Clock & Reset Controller
10 - Taniya Das <quic_tdas@quicinc.com>
13 Qualcomm video clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs.
17 include/dt-bindings/clock/qcom,videocc-sc7180.h
18 include/dt-bindings/clock/qcom,videocc-sc7280.h
19 include/dt-bindings/clock/qcom,videocc-sdm845.h
20 include/dt-bindings/clock/qcom,videocc-sm8150.h
21 include/dt-bindings/clock/qcom,videocc-sm8250.h
46 '#power-domain-cells':
54 A phandle and PM domain specifier for the MMCX power domain.
59 A phandle to an OPP node describing required MMCX performance point.
69 - '#power-domain-cells'
83 - description: Board XO source
97 - description: Board XO source
98 - description: Board active XO source
108 - qcom,sm8250-videocc
114 - description: Board XO source
115 - description: Board active XO source
122 additionalProperties: false
126 #include <dt-bindings/clock/qcom,rpmh.h>
127 #include <dt-bindings/power/qcom,rpmhpd.h>
128 clock-controller@ab00000 {
129 compatible = "qcom,sdm845-videocc";
130 reg = <0x0ab00000 0x10000>;
131 clocks = <&rpmhcc RPMH_CXO_CLK>;
132 clock-names = "bi_tcxo";
135 #power-domain-cells = <1>;
136 power-domains = <&rpmhpd RPMHPD_MMCX>;
137 required-opps = <&rpmhpd_opp_low_svs>;