1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Video Clock & Reset Controller Binding
10 - Taniya Das <tdas@codeaurora.org>
13 Qualcomm video clock control module which supports the clocks, resets and
14 power domains on Qualcomm SoCs.
17 dt-bindings/clock/qcom,videocc-sc7180.h
18 dt-bindings/clock/qcom,videocc-sc7280.h
19 dt-bindings/clock/qcom,videocc-sdm845.h
20 dt-bindings/clock/qcom,videocc-sm8150.h
21 dt-bindings/clock/qcom,videocc-sm8250.h
34 - description: Board XO source
46 '#power-domain-cells':
54 A phandle and PM domain specifier for the MMCX power domain.
59 A phandle to an OPP node describing required MMCX performance point.
69 - '#power-domain-cells'
71 additionalProperties: false
75 #include <dt-bindings/clock/qcom,rpmh.h>
76 #include <dt-bindings/power/qcom-rpmpd.h>
77 clock-controller@ab00000 {
78 compatible = "qcom,sdm845-videocc";
79 reg = <0x0ab00000 0x10000>;
80 clocks = <&rpmhcc RPMH_CXO_CLK>;
81 clock-names = "bi_tcxo";
84 #power-domain-cells = <1>;
85 power-domains = <&rpmhpd SM8250_MMCX>;
86 required-opps = <&rpmhpd_opp_low_svs>;