arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / Documentation / devicetree / bindings / clock / qcom,sm8450-videocc.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Video Clock & Reset Controller on SM8450
8
9 maintainers:
10   - Taniya Das <quic_tdas@quicinc.com>
11
12 description: |
13   Qualcomm video clock control module provides the clocks, resets and power
14   domains on SM8450.
15
16   See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h
17
18 properties:
19   compatible:
20     enum:
21       - qcom,sm8450-videocc
22       - qcom,sm8550-videocc
23
24   reg:
25     maxItems: 1
26
27   clocks:
28     items:
29       - description: Board XO source
30       - description: Video AHB clock from GCC
31
32   power-domains:
33     maxItems: 1
34     description:
35       MMCX power domain.
36
37   required-opps:
38     maxItems: 1
39     description:
40       A phandle to an OPP node describing required MMCX performance point.
41
42   '#clock-cells':
43     const: 1
44
45   '#reset-cells':
46     const: 1
47
48   '#power-domain-cells':
49     const: 1
50
51 required:
52   - compatible
53   - reg
54   - clocks
55   - power-domains
56   - required-opps
57   - '#clock-cells'
58   - '#reset-cells'
59   - '#power-domain-cells'
60
61 additionalProperties: false
62
63 examples:
64   - |
65     #include <dt-bindings/clock/qcom,gcc-sm8450.h>
66     #include <dt-bindings/clock/qcom,rpmh.h>
67     #include <dt-bindings/power/qcom,rpmhpd.h>
68     videocc: clock-controller@aaf0000 {
69       compatible = "qcom,sm8450-videocc";
70       reg = <0x0aaf0000 0x10000>;
71       clocks = <&rpmhcc RPMH_CXO_CLK>,
72                <&gcc GCC_VIDEO_AHB_CLK>;
73       power-domains = <&rpmhpd RPMHPD_MMCX>;
74       required-opps = <&rpmhpd_opp_low_svs>;
75       #clock-cells = <1>;
76       #reset-cells = <1>;
77       #power-domain-cells = <1>;
78     };
79 ...