1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM8450
10 - Konrad Dybcio <konrad.dybcio@linaro.org>
13 Qualcomm graphics clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs.
17 include/dt-bindings/clock/qcom,sm8450-gpucc.h
18 include/dt-bindings/clock/qcom,sm8550-gpucc.h
19 include/dt-bindings/reset/qcom,sm8450-gpucc.h
29 - description: Board XO source
30 - description: GPLL0 main branch source
31 - description: GPLL0 div branch source
39 '#power-domain-cells':
51 - '#power-domain-cells'
53 additionalProperties: false
57 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
58 #include <dt-bindings/clock/qcom,rpmh.h>
64 clock-controller@3d90000 {
65 compatible = "qcom,sm8450-gpucc";
66 reg = <0 0x03d90000 0 0xa000>;
67 clocks = <&rpmhcc RPMH_CXO_CLK>,
68 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
69 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
72 #power-domain-cells = <1>;