1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM8450
10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
13 Qualcomm camera clock control module provides the clocks, resets and power
17 include/dt-bindings/clock/qcom,sm8450-camcc.h
18 include/dt-bindings/clock/qcom,sm8550-camcc.h
28 - description: Camera AHB clock from GCC
29 - description: Board XO source
30 - description: Board active XO source
31 - description: Sleep clock source
36 A phandle and PM domain specifier for the MMCX power domain.
41 A phandle to an OPP node describing required MMCX performance point.
49 '#power-domain-cells':
63 - '#power-domain-cells'
65 additionalProperties: false
69 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
70 #include <dt-bindings/clock/qcom,rpmh.h>
71 #include <dt-bindings/power/qcom,rpmhpd.h>
72 clock-controller@ade0000 {
73 compatible = "qcom,sm8450-camcc";
74 reg = <0xade0000 0x20000>;
75 clocks = <&gcc GCC_CAMERA_AHB_CLK>,
76 <&rpmhcc RPMH_CXO_CLK>,
77 <&rpmhcc RPMH_CXO_CLK_A>,
79 power-domains = <&rpmhpd RPMHPD_MMCX>;
80 required-opps = <&rpmhpd_opp_low_svs>;
83 #power-domain-cells = <1>;