1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Imran Shaik <quic_imrashai@quicinc.com>
14 Qualcomm global clock control module which supports the clocks, resets and
15 power domains on QDU1000 and QRU1000
17 See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h
21 const: qcom,qdu1000-gcc
25 - description: Board XO source
26 - description: Sleep clock source
27 - description: PCIE 0 Pipe clock source
28 - description: PCIE 0 Phy Auxiliary clock source
29 - description: USB3 Phy wrapper pipe clock source
36 - $ref: qcom,gcc.yaml#
38 unevaluatedProperties: false
42 #include <dt-bindings/clock/qcom,rpmh.h>
43 clock-controller@100000 {
44 compatible = "qcom,qdu1000-gcc";
45 reg = <0x00100000 0x001f4200>;
46 clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
47 <&pcie_0_pipe_clk>, <&pcie_0_phy_aux_clk>,
48 <&usb3_phy_wrapper_pipe_clk>;
51 #power-domain-cells = <1>;