1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ9574
10 - Bjorn Andersson <andersson@kernel.org>
11 - Anusha Rao <quic_anusha@quicinc.com>
14 Qualcomm global clock control module provides the clocks, resets and power
18 include/dt-bindings/clock/qcom,ipq9574-gcc.h
19 include/dt-bindings/reset/qcom,ipq9574-gcc.h
23 const: qcom,ipq9574-gcc
27 - description: Board XO source
28 - description: Sleep clock source
29 - description: Bias PLL ubi clock source
30 - description: PCIE30 PHY0 pipe clock source
31 - description: PCIE30 PHY1 pipe clock source
32 - description: PCIE30 PHY2 pipe clock source
33 - description: PCIE30 PHY3 pipe clock source
34 - description: USB3 PHY pipe clock source
41 - $ref: qcom,gcc.yaml#
43 unevaluatedProperties: false
47 clock-controller@1800000 {
48 compatible = "qcom,ipq9574-gcc";
49 reg = <0x01800000 0x80000>;
50 clocks = <&xo_board_clk>,
52 <&bias_pll_ubi_nc_clk>,
53 <&pcie30_phy0_pipe_clk>,
54 <&pcie30_phy1_pipe_clk>,
55 <&pcie30_phy2_pipe_clk>,
56 <&pcie30_phy3_pipe_clk>,
57 <&usb3phy_0_cc_pipe_clk>;
60 #power-domain-cells = <1>;