1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5018
10 - Sricharan Ramabadhran <quic_srichara@quicinc.com>
13 Qualcomm global clock control module provides the clocks, resets and power
17 include/dt-bindings/clock/qcom,ipq5018-gcc.h
18 include/dt-bindings/reset/qcom,ipq5018-gcc.h
22 const: qcom,gcc-ipq5018
26 - description: Board XO source
27 - description: Sleep clock source
28 - description: PCIE20 PHY0 pipe clock source
29 - description: PCIE20 PHY1 pipe clock source
30 - description: USB3 PHY pipe clock source
31 - description: GEPHY RX clock source
32 - description: GEPHY TX clock source
33 - description: UNIPHY RX clock source
34 - description: UNIPHY TX clk source
41 - $ref: qcom,gcc.yaml#
43 unevaluatedProperties: false
47 clock-controller@1800000 {
48 compatible = "qcom,gcc-ipq5018";
49 reg = <0x01800000 0x80000>;
50 clocks = <&xo_board_clk>,
52 <&pcie20_phy0_pipe_clk>,
53 <&pcie20_phy1_pipe_clk>,
54 <&usb3_phy0_pipe_clk>,
61 #power-domain-cells = <1>;