1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SDM630 and SDM660
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 Qualcomm graphics clock control module provides the clocks, resets and
14 power domains on SDM630 and SDM660.
16 See also dt-bindings/clock/qcom,gpucc-sdm660.h.
26 - description: Board XO source
27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
33 - const: gcc_gpu_gpll0_clk
34 - const: gcc_gpu_gpll0_div_clk
42 '#power-domain-cells':
55 - '#power-domain-cells'
57 additionalProperties: false
61 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
62 #include <dt-bindings/clock/qcom,rpmcc.h>
64 clock-controller@5065000 {
65 compatible = "qcom,gpucc-sdm660";
66 reg = <0x05065000 0x9038>;
67 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
68 <&gcc GCC_GPU_GPLL0_CLK>,
69 <&gcc GCC_GPU_GPLL0_DIV_CLK>;
70 clock-names = "xo", "gcc_gpu_gpll0_clk",
71 "gcc_gpu_gpll0_div_clk";
73 #power-domain-cells = <1>;