1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SDX65
10 - Vamsi krishna Lanka <quic_vamslank@quicinc.com>
13 Qualcomm global clock control module provides the clocks, resets and power
16 See also:: include/dt-bindings/clock/qcom,gcc-sdx65.h
24 - description: Board XO source
25 - description: Board active XO source
26 - description: Sleep clock source
27 - description: PCIE Pipe clock source
28 - description: USB3 phy wrapper pipe clock source
35 - const: pcie_pipe_clk
36 - const: usb3_phy_wrapper_gcc_usb30_pipe_clk
44 - $ref: qcom,gcc.yaml#
46 unevaluatedProperties: false
50 #include <dt-bindings/clock/qcom,rpmh.h>
51 clock-controller@100000 {
52 compatible = "qcom,gcc-sdx65";
53 reg = <0x100000 0x1f7400>;
54 clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
55 <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
56 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
57 "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
60 #power-domain-cells = <1>;