1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains on SDM670 and SDM845
17 See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h
40 - $ref: qcom,gcc.yaml#
45 const: qcom,gcc-sdm670
50 - description: Board XO source
51 - description: Board active XO source
52 - description: Sleep clock source
63 const: qcom,gcc-sdm845
68 - description: Board XO source
69 - description: Board active XO source
70 - description: Sleep clock source
71 - description: PCIE 0 Pipe clock source
72 - description: PCIE 1 Pipe clock source
78 - const: pcie_0_pipe_clk
79 - const: pcie_1_pipe_clk
81 unevaluatedProperties: false
84 # Example for GCC for SDM845:
86 #include <dt-bindings/clock/qcom,rpmh.h>
87 clock-controller@100000 {
88 compatible = "qcom,gcc-sdm845";
89 reg = <0x100000 0x1f0000>;
90 clocks = <&rpmhcc RPMH_CXO_CLK>,
91 <&rpmhcc RPMH_CXO_CLK_A>,
95 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk", "pcie_1_pipe_clk";
98 #power-domain-cells = <1>;