Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Global Clock & Reset Controller on QCS404
   8
   9 maintainers:
  10   - Stephen Boyd <sboyd@kernel.org>
  11   - Taniya Das <quic_tdas@quicinc.com>
  12
  13 description: |
  14   Qualcomm global clock control module provides the clocks, resets and power
  15   domains on QCS404.
  16
  17   See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h
  18
  19 properties:
  20   compatible:
  21     const: qcom,gcc-qcs404
  22
  23   clocks:
  24     items:
  25       - description: XO source
  26       - description: Sleep clock source
  27       - description: PCIe 0 PIPE clock (optional)
  28       - description: DSI phy instance 0 dsi clock
  29       - description: DSI phy instance 0 byte clock
  30       - description: HDMI phy PLL clock
  31
  32   clock-names:
  33     items:
  34       - const: cxo
  35       - const: sleep_clk
  36       - const: pcie_0_pipe_clk_src
  37       - const: dsi0pll
  38       - const: dsi0pllbyte
  39       - const: hdmi_pll
  40
  41 required:
  42   - compatible
  43
  44 allOf:
  45   - $ref: qcom,gcc.yaml#
  46
  47 unevaluatedProperties: false
  48
  49 examples:
  50   - |
  51     clock-controller@1800000 {
  52       compatible = "qcom,gcc-qcs404";
  53       reg = <0x01800000 0x80000>;
  54       #clock-cells = <1>;
  55       #reset-cells = <1>;
  56       #power-domain-cells = <1>;
  57     };
  58 ...