1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ8064
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 Qualcomm global clock control module provides the clocks, resets and power
17 include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
18 include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
21 - $ref: qcom,gcc.yaml#
26 - const: qcom,gcc-ipq8064
32 - description: PXO source
33 - description: CXO source
34 - description: PLL4 from LCC
47 - $ref: /schemas/thermal/qcom-tsens.yaml#
54 unevaluatedProperties: false
58 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
59 #include <dt-bindings/interrupt-controller/arm-gic.h>
61 gcc: clock-controller@900000 {
62 compatible = "qcom,gcc-ipq8064", "syscon";
63 reg = <0x00900000 0x4000>;
64 clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>;
65 clock-names = "pxo", "cxo", "pll4";
68 #power-domain-cells = <1>;
70 tsens: thermal-sensor {
71 compatible = "qcom,ipq8064-tsens";
73 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
74 nvmem-cell-names = "calib", "calib_backup";
75 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-names = "uplow";
79 #thermal-sensor-cells = <1>;