1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
10 - $ref: qcom,gcc.yaml#
13 - Ansuel Smith <ansuelsmth@gmail.com>
16 Qualcomm global clock control module which supports the clocks, resets and
17 power domains on IPQ8064.
20 - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
21 - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
26 - const: qcom,gcc-ipq8064
31 - description: PXO source
32 - description: CXO source
43 - $ref: /schemas/thermal/qcom-tsens.yaml#
50 unevaluatedProperties: false
54 #include <dt-bindings/interrupt-controller/arm-gic.h>
56 gcc: clock-controller@900000 {
57 compatible = "qcom,gcc-ipq8064", "syscon";
58 reg = <0x00900000 0x4000>;
59 clocks = <&pxo_board>, <&cxo_board>;
60 clock-names = "pxo", "cxo";
63 #power-domain-cells = <1>;
65 tsens: thermal-sensor {
66 compatible = "qcom,ipq8064-tsens";
68 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
69 nvmem-cell-names = "calib", "calib_backup";
70 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
71 interrupt-names = "uplow";
74 #thermal-sensor-cells = <1>;