1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module
10 - Jacky Bai <ping.bai@nxp.com>
13 On i.MX8ULP, The clock sources generation, distribution and management is
14 under the control of several CGCs & PCCs modules. The PCC modules control
15 software reset, clock selection, optional division and clock gating mode
40 additionalProperties: false
43 # Peripheral Clock Control Module node:
45 clock-controller@292d0000 {
46 compatible = "fsl,imx8ulp-pcc3";
47 reg = <0x292d0000 0x10000>;