1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Family Clock Control Module Binding
10 - Anson Huang <Anson.Huang@nxp.com>
13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
14 controller, which generates and supplies to all modules.
38 The clock consumer should specify the desired clock by having the clock
39 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
40 for the full list of i.MX8M clock IDs.
59 - description: 32k osc
60 - description: 25m osc
61 - description: 27m osc
62 - description: ext1 clock input
63 - description: ext2 clock input
64 - description: ext3 clock input
65 - description: ext4 clock input
79 - description: 32k osc
80 - description: 24m osc
81 - description: ext1 clock input
82 - description: ext2 clock input
83 - description: ext3 clock input
84 - description: ext4 clock input
95 additionalProperties: false
98 # Clock Control Module node:
100 clock-controller@30380000 {
101 compatible = "fsl,imx8mm-ccm";
102 reg = <0x30380000 0x10000>;
104 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
105 <&clk_ext3>, <&clk_ext4>;
106 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
107 "clk_ext3", "clk_ext4";
111 clock-controller@30390000 {
112 compatible = "fsl,imx8mq-ccm";
113 reg = <0x30380000 0x10000>;
115 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
116 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
117 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
118 "clk_ext2", "clk_ext3", "clk_ext4";