1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
11 clock generators providing from 3 to 12 output clocks.
13 When referencing the provided clock in the DT using phandle and clock
14 specifier, the following mapping applies:
33 The idt,shutdown and idt,output-enable-active properties control the
34 SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown
35 Register, respectively. Their behavior is summarized by the following
38 SH SP Output when the SD/OE pin is Low/High
39 == == =====================================
45 The case where SH and SP are both 1 is likely not very interesting.
48 - Luca Ceresoli <luca.ceresoli@bootlin.com>
62 description: I2C device address
77 idt,xtal-load-femtofarads:
80 description: Optional load capacitor for XTAL1 and XTAL2
83 $ref: /schemas/types.yaml#/definitions/uint32
86 If 1, this enables the shutdown functionality: the chip will be
87 shut down if the SD/OE pin is driven high. If 0, this disables the
88 shutdown functionality: the chip will never be shut down based on
89 the value of the SD/OE pin. This property corresponds to the SH
90 bit of the Primary Source and Shutdown Register.
92 idt,output-enable-active:
93 $ref: /schemas/types.yaml#/definitions/uint32
96 If 1, this enables output when the SD/OE pin is high, and disables
97 output when the SD/OE pin is low. If 0, this disables output when
98 the SD/OE pin is high, and enables output when the SD/OE pin is
99 low. This corresponds to the SP bit of the Primary Source and
106 Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
107 Configuration" in the Versaclock 5/6/6E Family Register Description
108 and Programming Guide.
112 The output drive mode. Values defined in dt-bindings/clock/versaclock.h
113 $ref: /schemas/types.yaml#/definitions/uint32
116 idt,voltage-microvolt:
117 description: The output drive voltage.
118 enum: [ 1800000, 2500000, 3300000 ]
120 description: The Slew rate control for CMOS single-ended.
121 enum: [ 80, 85, 90, 100 ]
122 additionalProperties: false
129 - idt,output-enable-active
140 # Devices with builtin crystal + optional external input
147 # Devices without builtin crystal
152 additionalProperties: false
156 #include <dt-bindings/clock/versaclock.h>
158 /* 25MHz reference crystal */
160 compatible = "fixed-clock";
162 clock-frequency = <25000000>;
167 #address-cells = <1>;
170 /* IDT 5P49V5923 I2C clock generator */
171 vc5: clock-generator@6a {
172 compatible = "idt,5p49v5923";
176 /* Connect XIN input to 25MHz reference */
180 /* Set the SD/OE pin's settings */
182 idt,output-enable-active = <0>;
185 idt,mode = <VC5_CMOSD>;
186 idt,voltage-microvolt = <1800000>;
187 idt,slew-percent = <80>;
191 idt,mode = <VC5_LVDS>;