1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
11 clock generators providing from 3 to 12 output clocks.
13 When referencing the provided clock in the DT using phandle and clock
14 specifier, the following mapping applies:
33 The idt,shutdown and idt,output-enable-active properties control the
34 SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown
35 Register, respectively. Their behavior is summarized by the following
38 SH SP Output when the SD/OE pin is Low/High
39 == == =====================================
45 The case where SH and SP are both 1 is likely not very interesting.
48 - Luca Ceresoli <luca.ceresoli@bootlin.com>
63 description: I2C device address
78 idt,xtal-load-femtofarads:
81 description: Optional load capacitor for XTAL1 and XTAL2
84 $ref: /schemas/types.yaml#/definitions/uint32
87 If 1, this enables the shutdown functionality: the chip will be
88 shut down if the SD/OE pin is driven high. If 0, this disables the
89 shutdown functionality: the chip will never be shut down based on
90 the value of the SD/OE pin. This property corresponds to the SH
91 bit of the Primary Source and Shutdown Register.
93 idt,output-enable-active:
94 $ref: /schemas/types.yaml#/definitions/uint32
97 If 1, this enables output when the SD/OE pin is high, and disables
98 output when the SD/OE pin is low. If 0, this disables output when
99 the SD/OE pin is high, and enables output when the SD/OE pin is
100 low. This corresponds to the SP bit of the Primary Source and
107 Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
108 Configuration" in the Versaclock 5/6/6E Family Register Description
109 and Programming Guide.
113 The output drive mode. Values defined in dt-bindings/clock/versaclock.h
114 $ref: /schemas/types.yaml#/definitions/uint32
117 idt,voltage-microvolt:
118 description: The output drive voltage.
119 enum: [ 1800000, 2500000, 3300000 ]
121 description: The Slew rate control for CMOS single-ended.
122 enum: [ 80, 85, 90, 100 ]
123 additionalProperties: false
130 - idt,output-enable-active
141 # Devices with builtin crystal + optional external input
148 # Devices without builtin crystal
153 additionalProperties: false
157 #include <dt-bindings/clock/versaclock.h>
159 /* 25MHz reference crystal */
161 compatible = "fixed-clock";
163 clock-frequency = <25000000>;
168 #address-cells = <1>;
171 /* IDT 5P49V5923 I2C clock generator */
172 vc5: clock-generator@6a {
173 compatible = "idt,5p49v5923";
177 /* Connect XIN input to 25MHz reference */
181 /* Set the SD/OE pin's settings */
183 idt,output-enable-active = <0>;
186 idt,mode = <VC5_CMOSD>;
187 idt,voltage-microvolt = <1800000>;
188 idt,slew-percent = <80>;
192 idt,mode = <VC5_LVDS>;