1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/hisilicon,hi3559av100-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon SOC Clock for HI3559AV100
10 - Dongjiu Geng <gengdongjiu@huawei.com>
13 Hisilicon SOC clock control module which supports the clocks, resets and
14 power domains on HI3559AV100.
17 dt-bindings/clock/hi3559av100-clock.h
22 - hisilicon,hi3559av100-clock
23 - hisilicon,hi3559av100-shub-clock
35 First cell is reset request register offset.
36 Second cell is bit offset in reset request register.
44 additionalProperties: false
52 clock-controller@12010000 {
53 compatible = "hisilicon,hi3559av100-clock";
56 reg = <0x0 0x12010000 0x0 0x10000>;