1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AHCI SATA Controller
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
11 Each SATA controller should have its own node.
13 It is possible, but not required, to represent each port as a sub-node.
14 It allows to enable each port independently when dealing with multiple
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
27 - cavium,octeon-7130-ahci
30 - marvell,armada-3700-ahci
31 - marvell,armada-8k-ahci
32 - marvell,berlin2q-ahci
33 - socionext,uniphier-pro4-ahci
34 - socionext,uniphier-pxs2-ahci
35 - socionext,uniphier-pxs3-ahci
45 - marvell,armada-8k-ahci
46 - marvell,berlin2-ahci
47 - marvell,berlin2q-ahci
48 - socionext,uniphier-pro4-ahci
49 - socionext,uniphier-pxs2-ahci
50 - socionext,uniphier-pxs3-ahci
53 - cavium,octeon-7130-ahci
56 - marvell,armada-3700-ahci
84 "^sata-port@[0-9a-f]+$":
85 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
89 - required: [ target-supply ]
91 unevaluatedProperties: false
99 - $ref: ahci-common.yaml#
104 const: socionext,uniphier-pro4-ahci
109 - description: reset line for the parent
110 - description: reset line for the glue logic
111 - description: reset line for the controller
120 - socionext,uniphier-pxs2-ahci
121 - socionext,uniphier-pxs3-ahci
126 - description: reset for the glue logic
127 - description: reset for the controller
135 unevaluatedProperties: false
140 compatible = "snps,spear-ahci";
141 reg = <0xffe08000 0x1000>;
145 #include <dt-bindings/interrupt-controller/arm-gic.h>
146 #include <dt-bindings/clock/berlin2q.h>
147 #include <dt-bindings/ata/ahci.h>
150 compatible = "marvell,berlin2q-ahci", "generic-ahci";
151 reg = <0xf7e90000 0x1000>;
152 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&chip CLKID_SATA>;
154 #address-cells = <1>;
157 hba-cap = <HBA_SMPS>;
162 phys = <&sata_phy 0>;
163 target-supply = <®_sata0>;
165 hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
171 phys = <&sata_phy 1>;
172 target-supply = <®_sata1>;
174 hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;