Documentation/devicetree/bindings/ata/ahci-platform.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: AHCI SATA Controller
   8
   9 description: |
  10   SATA nodes are defined to describe on-chip Serial ATA controllers.
  11   Each SATA controller should have its own node.
  12
  13   It is possible, but not required, to represent each port as a sub-node.
  14   It allows to enable each port independently when dealing with multiple
  15   PHYs.
  16
  17 maintainers:
  18   - Hans de Goede <hdegoede@redhat.com>
  19   - Jens Axboe <axboe@kernel.dk>
  20
  21 select:
  22   properties:
  23     compatible:
  24       contains:
  25         enum:
  26           - brcm,iproc-ahci
  27           - cavium,octeon-7130-ahci
  28           - hisilicon,hisi-ahci
  29           - ibm,476gtr-ahci
  30           - marvell,armada-3700-ahci
  31           - marvell,armada-8k-ahci
  32           - marvell,berlin2q-ahci
  33           - snps,dwc-ahci
  34           - snps,spear-ahci
  35   required:
  36     - compatible
  37
  38 allOf:
  39   - $ref: "sata-common.yaml#"
  40
  41
  42 properties:
  43   compatible:
  44     oneOf:
  45       - items:
  46           - enum:
  47               - brcm,iproc-ahci
  48               - marvell,armada-8k-ahci
  49               - marvell,berlin2-ahci
  50               - marvell,berlin2q-ahci
  51           - const: generic-ahci
  52       - items:
  53           - enum:
  54               - rockchip,rk3568-dwc-ahci
  55           - const: snps,dwc-ahci
  56       - enum:
  57           - cavium,octeon-7130-ahci
  58           - hisilicon,hisi-ahci
  59           - ibm,476gtr-ahci
  60           - marvell,armada-3700-ahci
  61           - snps,dwc-ahci
  62           - snps,spear-ahci
  63
  64   reg:
  65     minItems: 1
  66     maxItems: 2
  67
  68   reg-names:
  69     maxItems: 1
  70
  71   clocks:
  72     description:
  73       Clock IDs array as required by the controller.
  74     minItems: 1
  75     maxItems: 3
  76
  77   clock-names:
  78     description:
  79       Names of clocks corresponding to IDs in the clock property.
  80     minItems: 1
  81     maxItems: 3
  82
  83   interrupts:
  84     maxItems: 1
  85
  86   ahci-supply:
  87     description:
  88       regulator for AHCI controller
  89
  90   dma-coherent: true
  91
  92   phy-supply:
  93     description:
  94       regulator for PHY power
  95
  96   phys:
  97     description:
  98       List of all PHYs on this controller
  99     maxItems: 1
 100
 101   phy-names:
 102     description:
 103       Name specifier for the PHYs
 104     maxItems: 1
 105
 106   ports-implemented:
 107     $ref: '/schemas/types.yaml#/definitions/uint32'
 108     description: |
 109       Mask that indicates which ports that the HBA supports
 110       are available for software to use. Useful if PORTS_IMPL
 111       is not programmed by the BIOS, which is true with
 112       some embedded SoCs.
 113     maximum: 0x1f
 114
 115   power-domains:
 116     maxItems: 1
 117
 118   resets:
 119     maxItems: 1
 120
 121   target-supply:
 122     description:
 123       regulator for SATA target power
 124
 125 required:
 126   - compatible
 127   - reg
 128   - interrupts
 129
 130 patternProperties:
 131   "^sata-port@[0-9a-f]+$":
 132     type: object
 133     additionalProperties: false
 134     description:
 135       Subnode with configuration of the Ports.
 136
 137     properties:
 138       reg:
 139         maxItems: 1
 140
 141       phys:
 142         maxItems: 1
 143
 144       phy-names:
 145         maxItems: 1
 146
 147       target-supply:
 148         description:
 149           regulator for SATA target power
 150
 151     required:
 152       - reg
 153
 154     anyOf:
 155       - required: [ phys ]
 156       - required: [ target-supply ]
 157
 158 unevaluatedProperties: false
 159
 160 examples:
 161   - |
 162     sata@ffe08000 {
 163         compatible = "snps,spear-ahci";
 164         reg = <0xffe08000 0x1000>;
 165         interrupts = <115>;
 166     };
 167   - |
 168     #include <dt-bindings/interrupt-controller/arm-gic.h>
 169     #include <dt-bindings/clock/berlin2q.h>
 170     sata@f7e90000 {
 171         compatible = "marvell,berlin2q-ahci", "generic-ahci";
 172         reg = <0xf7e90000 0x1000>;
 173         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 174         clocks = <&chip CLKID_SATA>;
 175         #address-cells = <1>;
 176         #size-cells = <0>;
 177
 178         sata0: sata-port@0 {
 179             reg = <0>;
 180             phys = <&sata_phy 0>;
 181             target-supply = <&reg_sata0>;
 182         };
 183
 184         sata1: sata-port@1 {
 185             reg = <1>;
 186             phys = <&sata_phy 1>;
 187             target-supply = <&reg_sata1>;
 188         };
 189     };