Linux 6.7-rc7
[linux-modified.git] / Documentation / devicetree / bindings / ata / ahci-platform.yaml
1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: AHCI SATA Controller
8
9 description: |
10   SATA nodes are defined to describe on-chip Serial ATA controllers.
11   Each SATA controller should have its own node.
12
13   It is possible, but not required, to represent each port as a sub-node.
14   It allows to enable each port independently when dealing with multiple
15   PHYs.
16
17 maintainers:
18   - Hans de Goede <hdegoede@redhat.com>
19   - Jens Axboe <axboe@kernel.dk>
20
21 select:
22   properties:
23     compatible:
24       contains:
25         enum:
26           - brcm,iproc-ahci
27           - cavium,octeon-7130-ahci
28           - hisilicon,hisi-ahci
29           - ibm,476gtr-ahci
30           - marvell,armada-3700-ahci
31           - marvell,armada-8k-ahci
32           - marvell,berlin2q-ahci
33           - socionext,uniphier-pro4-ahci
34           - socionext,uniphier-pxs2-ahci
35           - socionext,uniphier-pxs3-ahci
36   required:
37     - compatible
38
39 properties:
40   compatible:
41     oneOf:
42       - items:
43           - enum:
44               - brcm,iproc-ahci
45               - marvell,armada-8k-ahci
46               - marvell,berlin2-ahci
47               - marvell,berlin2q-ahci
48               - socionext,uniphier-pro4-ahci
49               - socionext,uniphier-pxs2-ahci
50               - socionext,uniphier-pxs3-ahci
51           - const: generic-ahci
52       - enum:
53           - cavium,octeon-7130-ahci
54           - hisilicon,hisi-ahci
55           - ibm,476gtr-ahci
56           - marvell,armada-3700-ahci
57
58   reg:
59     minItems: 1
60     maxItems: 2
61
62   reg-names:
63     maxItems: 1
64
65   clocks:
66     minItems: 1
67     maxItems: 3
68
69   clock-names:
70     minItems: 1
71     maxItems: 3
72
73   interrupts:
74     maxItems: 1
75
76   power-domains:
77     maxItems: 1
78
79   resets:
80     minItems: 1
81     maxItems: 3
82
83 patternProperties:
84   "^sata-port@[0-9a-f]+$":
85     $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
86
87     anyOf:
88       - required: [ phys ]
89       - required: [ target-supply ]
90
91     unevaluatedProperties: false
92
93 required:
94   - compatible
95   - reg
96   - interrupts
97
98 allOf:
99   - $ref: ahci-common.yaml#
100   - if:
101       properties:
102         compatible:
103           contains:
104             const: socionext,uniphier-pro4-ahci
105     then:
106       properties:
107         resets:
108           items:
109             - description: reset line for the parent
110             - description: reset line for the glue logic
111             - description: reset line for the controller
112       required:
113         - resets
114     else:
115       if:
116         properties:
117           compatible:
118             contains:
119               enum:
120                 - socionext,uniphier-pxs2-ahci
121                 - socionext,uniphier-pxs3-ahci
122       then:
123         properties:
124           resets:
125             items:
126               - description: reset for the glue logic
127               - description: reset for the controller
128         required:
129           - resets
130       else:
131         properties:
132           resets:
133             maxItems: 1
134
135 unevaluatedProperties: false
136
137 examples:
138   - |
139     sata@ffe08000 {
140         compatible = "snps,spear-ahci";
141         reg = <0xffe08000 0x1000>;
142         interrupts = <115>;
143     };
144   - |
145     #include <dt-bindings/interrupt-controller/arm-gic.h>
146     #include <dt-bindings/clock/berlin2q.h>
147     #include <dt-bindings/ata/ahci.h>
148
149     sata@f7e90000 {
150         compatible = "marvell,berlin2q-ahci", "generic-ahci";
151         reg = <0xf7e90000 0x1000>;
152         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
153         clocks = <&chip CLKID_SATA>;
154         #address-cells = <1>;
155         #size-cells = <0>;
156
157         hba-cap = <HBA_SMPS>;
158
159         sata0: sata-port@0 {
160             reg = <0>;
161
162             phys = <&sata_phy 0>;
163             target-supply = <&reg_sata0>;
164
165             hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
166         };
167
168         sata1: sata-port@1 {
169             reg = <1>;
170
171             phys = <&sata_phy 1>;
172             target-supply = <&reg_sata1>;
173
174             hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;
175         };
176     };