3 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
4 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
7 The TWD is usually attached to a GIC to deliver its two per-processor
10 ** Timer node required properties:
12 - compatible : Should be one of:
13 "arm,cortex-a9-twd-timer"
14 "arm,cortex-a5-twd-timer"
15 "arm,arm11mp-twd-timer"
17 - interrupts : One interrupt to each core
19 - reg : Specify the base address and the size of the TWD timer
24 - always-on : a boolean property. If present, the timer is powered through
25 an always-on power domain, therefore it never loses context.
30 compatible = "arm,arm11mp-twd-timer"";
31 reg = <0x2c000600 0x20>;
32 interrupts = <1 13 0xf01>;
35 ** Watchdog node properties:
37 - compatible : Should be one of:
38 "arm,cortex-a9-twd-wdt"
39 "arm,cortex-a5-twd-wdt"
42 - interrupts : One interrupt to each core
44 - reg : Specify the base address and the size of the TWD watchdog
49 twd-watchdog@2c000620 {
50 compatible = "arm,arm11mp-twd-wdt";
51 reg = <0x2c000620 0x20>;
52 interrupts = <1 14 0xf01>;