1 NVIDIA Tegra30 MC(Memory Controller)
4 - compatible : "nvidia,tegra30-mc"
5 - reg : Should contain 4 register ranges(address and length); see the
6 example below. Note that the MC registers are interleaved with the
7 SMMU registers, and hence must be represented as multiple ranges.
8 - interrupts : Should contain MC General interrupt.
12 compatible = "nvidia,tegra30-mc";
13 reg = <0x7000f000 0x010
17 interrupts = <0 77 0x04>;