Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: MediaTek Peripheral Configuration Controller
   8
   9 maintainers:
  10   - Bartosz Golaszewski <bgolaszewski@baylibre.com>
  11
  12 description:
  13   The Mediatek pericfg controller provides various clocks and reset outputs
  14   to the system.
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - items:
  20           - enum:
  21               - mediatek,mt2701-pericfg
  22               - mediatek,mt2712-pericfg
  23               - mediatek,mt6765-pericfg
  24               - mediatek,mt6795-pericfg
  25               - mediatek,mt7622-pericfg
  26               - mediatek,mt7629-pericfg
  27               - mediatek,mt8135-pericfg
  28               - mediatek,mt8173-pericfg
  29               - mediatek,mt8183-pericfg
  30               - mediatek,mt8186-pericfg
  31               - mediatek,mt8188-pericfg
  32               - mediatek,mt8195-pericfg
  33               - mediatek,mt8516-pericfg
  34           - const: syscon
  35       - items:
  36           # Special case for mt7623 for backward compatibility
  37           - const: mediatek,mt7623-pericfg
  38           - const: mediatek,mt2701-pericfg
  39           - const: syscon
  40
  41   reg:
  42     maxItems: 1
  43
  44   '#clock-cells':
  45     const: 1
  46
  47   '#reset-cells':
  48     const: 1
  49
  50 required:
  51   - compatible
  52   - reg
  53
  54 additionalProperties: false
  55
  56 examples:
  57   - |
  58     pericfg@10003000 {
  59         compatible = "mediatek,mt8173-pericfg", "syscon";
  60         reg = <0x10003000 0x1000>;
  61         #clock-cells = <1>;
  62         #reset-cells = <1>;
  63     };
  64
  65   - |
  66     pericfg@10003000 {
  67         compatible =  "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon";
  68         reg = <0x10003000 0x1000>;
  69         #clock-cells = <1>;
  70         #reset-cells = <1>;
  71     };