1 Mediatek mipi0a (mipi_rx_ana_csi0a) controller
2 ============================
4 The Mediatek mipi0a controller provides various clocks
9 - compatible: Should be one of:
10 - "mediatek,mt6765-mipi0a", "syscon"
11 - #clock-cells: Must be 1
13 The mipi0a controller uses the common clk binding from
14 Documentation/devicetree/bindings/clock/clock-bindings.txt
15 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
17 The mipi0a controller also uses the common power domain from
18 Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
19 The available power domains are defined in dt-bindings/power/mt*-power.h.
23 mipi0a: clock-controller@11c10000 {
24 compatible = "mediatek,mt6765-mipi0a", "syscon";
25 reg = <0 0x11c10000 0 0x1000>;
26 power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>;