3 Chipid required properties:
4 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5 - reg : Should contain registers location and length
7 PIT Timer required properties:
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
13 PIT64B Timer required properties:
14 - compatible: Should be "microchip,sam9x60-pit64b"
15 - reg: Should contain registers location and length
16 - interrupts: Should contain interrupt for PIT64B timer
17 - clocks: Should contain the available clock sources for PIT64B timer.
19 System Timer (ST) required properties:
20 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
21 - reg: Should contain registers location and length
22 - interrupts: Should contain interrupt for the ST which is the IRQ line
23 shared across all System Controller members.
24 - clocks: phandle to input clock.
26 - watchdog: compatible should be "atmel,at91rm9200-wdt"
28 RAMC SDRAM/DDR Controller required properties:
29 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
30 "atmel,at91sam9260-sdramc",
31 "atmel,at91sam9g45-ddramc",
32 "atmel,sama5d3-ddramc",
33 "microchip,sam9x60-ddramc",
34 "microchip,sama7g5-uddrc"
35 - reg: Should contain registers location and length
39 ramc0: ramc@ffffe800 {
40 compatible = "atmel,at91sam9g45-ddramc";
41 reg = <0xffffe800 0x200>;
44 RAMC PHY Controller required properties:
45 - compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
46 - reg: Should contain registers location and length
50 ddr3phy: ddr3phy@e3804000 {
51 compatible = "microchip,sama7g5-ddr3phy", "syscon";
52 reg = <0xe3804000 0x1000>;
55 Special Function Registers (SFR)
57 Special Function Registers (SFR) manage specific aspects of the integrated
58 memory, bridge implementations, processor and other functionality not controlled
62 - compatible: Should be "atmel,<chip>-sfr", "syscon" or
63 "atmel,<chip>-sfrbu", "syscon"
64 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
65 It also can be "microchip,sam9x60-sfr", "syscon".
66 - reg: Should contain registers location and length
69 compatible = "atmel,sama5d3-sfr", "syscon";
70 reg = <0xf0038000 0x60>;
73 Security Module (SECUMOD)
75 The Security Module macrocell provides all necessary secure functions to avoid
76 voltage, temperature, frequency and mechanical attacks on the chip. It also
77 embeds secure memories that can be scrambled.
79 The Security Module also offers the PIOBU pins which can be used as GPIO pins.
80 Note that they maintain their voltage during Backup/Self-refresh.
83 - compatible: Should be "atmel,<chip>-secumod", "syscon".
84 <chip> can be "sama5d2".
85 - reg: Should contain registers location and length
86 - gpio-controller: Marks the port as GPIO controller.
87 - #gpio-cells: There are 2. The pin number is the
88 first, the second represents additional
89 parameters such as GPIO_ACTIVE_HIGH/LOW.
93 compatible = "atmel,sama5d2-secumod", "syscon";
94 reg = <0xfc040000 0x100>;