1 What: /sys/bus/platform/devices/dfl-fme.0/ports_num
4 Contact: Wu Hao <hao.wu@intel.com>
5 Description: Read-only. One DFL FPGA device may have more than 1
6 port/Accelerator Function Unit (AFU). It returns the
7 number of ports on the FPGA device when read it.
9 What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id
12 Contact: Wu Hao <hao.wu@intel.com>
13 Description: Read-only. It returns Bitstream (static FPGA region)
14 identifier number, which includes the detailed version
15 and other information of this static FPGA region.
17 What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata
20 Contact: Wu Hao <hao.wu@intel.com>
21 Description: Read-only. It returns Bitstream (static FPGA region) meta
22 data, which includes the synthesis date, seed and other
23 information of this static FPGA region.