Documentation/ABI/stable/sysfs-driver-mlxreg-io

   1 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_health
   2 Date:           June 2018
   3 KernelVersion:  4.19
   4 Contact:        Vadim Pasternak <vadimp@nvidia.com>
   5 Description:    This file shows ASIC health status. The possible values are:
   6                 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
   7
   8                 The files are read only.
   9
  10 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_version
  11 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_version
  12 Date:           June 2018
  13 KernelVersion:  4.19
  14 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  15 Description:    These files show with which CPLD versions have been burned
  16                 on carrier and switch boards.
  17
  18                 The files are read only.
  19
  20 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/fan_dir
  21 Date:           December 2018
  22 KernelVersion:  5.0
  23 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  24 Description:    This file shows the system fans direction:
  25                 forward direction - relevant bit is set 0;
  26                 reversed direction - relevant bit is set 1.
  27
  28                 The files are read only.
  29
  30 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version
  31 Date:           November 2018
  32 KernelVersion:  5.0
  33 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  34 Description:    These files show with which CPLD versions have been burned
  35                 on LED or Gearbox board.
  36
  37                 The files are read only.
  38
  39 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_enable
  40 Date:           November 2018
  41 KernelVersion:  5.0
  42 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  43 Description:    These files enable and disable the access to the JTAG domain.
  44                 By default access to the JTAG domain is disabled.
  45
  46                 The file is read/write.
  47
  48 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/select_iio
  49 Date:           June 2018
  50 KernelVersion:  4.19
  51 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  52 Description:    This file allows iio devices selection.
  53
  54                 Attribute select_iio can be written with 0 or with 1. It
  55                 selects which one of iio devices can be accessed.
  56
  57                 The file is read/write.
  58
  59 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu1_on
  60                 /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu2_on
  61                 /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_cycle
  62                 /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_down
  63 Date:           June 2018
  64 KernelVersion:  4.19
  65 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  66 Description:    These files allow asserting system power cycling, switching
  67                 power supply units on and off and system's main power domain
  68                 shutdown.
  69                 Expected behavior:
  70                 When pwr_cycle is written 1: auxiliary power domain will go
  71                 down and after short period (about 1 second) up.
  72                 When  psu1_on or psu2_on is written 1, related unit will be
  73                 disconnected from the power source, when written 0 - connected.
  74                 If both are written 1 - power supplies main power domain will
  75                 go down.
  76                 When pwr_down is written 1, system's main power domain will go
  77                 down.
  78
  79                 The files are write only.
  80
  81 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_aux_pwr_or_ref
  82 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_asic_thermal
  83 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_hotswap_or_halt
  84 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_hotswap_or_wd
  85 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_fw_reset
  86 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pb
  87 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_main_pwr_fail
  88 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_short_pb
  89 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sw_reset
  90 Date:           June 2018
  91 KernelVersion:  4.19
  92 Contact:        Vadim Pasternak <vadimp@nvidia.com>
  93 Description:    These files show the system reset cause, as following: power
  94                 auxiliary outage or power refresh, ASIC thermal shutdown, halt,
  95                 hotswap, watchdog, firmware reset, long press power button,
  96                 short press power button, software reset. Value 1 in file means
  97                 this is reset cause, 0 - otherwise. Only one of the above
  98                 causes could be 1 at the same time, representing only last
  99                 reset cause.
 100
 101                 The files are read only.
 102
 103 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_comex_pwr_fail
 104 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_from_comex
 105 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_system
 106 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_voltmon_upgrade_fail
 107 Date:           November 2018
 108 KernelVersion:  5.0
 109 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 110 Description:    These files show the system reset cause, as following: ComEx
 111                 power fail, reset from ComEx, system platform reset, reset
 112                 due to voltage monitor devices upgrade failure,
 113                 Value 1 in file means this is reset cause, 0 - otherwise.
 114                 Only one bit could be 1 at the same time, representing only
 115                 the last reset cause.
 116
 117                 The files are read only.
 118
 119 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_version
 120 Date:           November 2018
 121 KernelVersion:  5.0
 122 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 123 Description:    These files show with which CPLD versions have been burned
 124                 on LED board.
 125
 126                 The files are read only.
 127
 128 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_comex_thermal
 129 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_comex_wd
 130 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_from_asic
 131 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_reload_bios
 132 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sff_wd
 133 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_wd
 134 Date:           June 2019
 135 KernelVersion:  5.3
 136 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 137 Description:    These files show the system reset cause, as following:
 138                 COMEX thermal shutdown; wathchdog power off or reset was derived
 139                 by one of the next components: COMEX, switch board or by Small Form
 140                 Factor mezzanine, reset requested from ASIC, reset caused by BIOS
 141                 reload. Value 1 in file means this is reset cause, 0 - otherwise.
 142                 Only one of the above causes could be 1 at the same time, representing
 143                 only last reset cause.
 144
 145                 The files are read only.
 146
 147 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config1
 148 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config2
 149 Date:           January 2020
 150 KernelVersion:  5.6
 151 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 152 Description:    These files show system static topology identification
 153                 like system's static I2C topology, number and type of FPGA
 154                 devices within the system and so on.
 155
 156                 The files are read only.
 157
 158 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_ac_pwr_fail
 159 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_platform
 160 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_soc
 161 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sw_pwr_off
 162 Date:           January 2020
 163 KernelVersion:  5.6
 164 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 165 Description:    These files show the system reset causes, as following: reset
 166                 due to AC power failure, reset invoked from software by
 167                 assertion reset signal through CPLD. reset caused by signal
 168                 asserted by SOC through ACPI register, reset invoked from
 169                 software by assertion power off signal through CPLD.
 170
 171                 The files are read only.
 172
 173 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pcie_asic_reset_dis
 174 Date:           January 2020
 175 KernelVersion:  5.6
 176 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 177 Description:    This file allows to retain ASIC up during PCIe root complex
 178                 reset, when attribute is set 1.
 179
 180                 The file is read/write.
 181
 182 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/vpd_wp
 183 Date:           January 2020
 184 KernelVersion:  5.6
 185 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 186 Description:    This file allows to overwrite system VPD hardware write
 187                 protection when attribute is set 1.
 188
 189                 The file is read/write.
 190
 191 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/voltreg_update_status
 192 Date:           January 2020
 193 KernelVersion:  5.6
 194 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 195 Description:    This file exposes the configuration update status of burnable
 196                 voltage regulator devices. The status values are as following:
 197                 0 - OK; 1 - CRC failure; 2 = I2C failure; 3 - in progress.
 198
 199                 The file is read only.
 200
 201 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/ufm_version
 202 Date:           January 2020
 203 KernelVersion:  5.6
 204 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 205 Description:    This file exposes the firmware version of burnable voltage
 206                 regulator devices.
 207
 208                 The file is read only.
 209
 210 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_pn
 211 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_pn
 212 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_pn
 213 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_pn
 214 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_version_min
 215 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_version_min
 216 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version_min
 217 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_version_min
 218 Date:           July 2020
 219 KernelVersion:  5.9
 220 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 221 Description:    These files show with which CPLD part numbers and minor
 222                 versions have been burned CPLD devices equipped on a
 223                 system.
 224
 225                 The files are read only.
 226
 227 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_active_image
 228 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_auth_fail
 229 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_upgrade_fail
 230 Date:           October 2021
 231 KernelVersion:  5.16
 232 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 233 Description:    The files represent BIOS statuses:
 234
 235                 bios_active_image: location of current active BIOS image:
 236                 0: Top, 1: Bottom.
 237                 The reported value should correspond to value expected by OS
 238                 in case of BIOS safe mode is 0. This bit is related to Intel
 239                 top-swap feature of DualBios on the same flash.
 240
 241                 bios_auth_fail: BIOS upgrade is failed because provided BIOS
 242                 image is not signed correctly.
 243
 244                 bios_upgrade_fail: BIOS upgrade is failed by some other
 245                 reason not because authentication. For example due to
 246                 physical SPI flash problem.
 247
 248                 The files are read only.
 249
 250 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_enable
 251 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_enable
 252 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_enable
 253 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_enable
 254 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_enable
 255 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_enable
 256 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_enable
 257 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_enable
 258 Date:           October 2021
 259 KernelVersion:  5.16
 260 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 261 Description:    These files allow line cards enable state control.
 262                 Expected behavior:
 263                 When  lc{n}_enable is written 1, related line card is released
 264                 from the reset state, when 0 - is hold in reset state.
 265
 266                 The files are read/write.
 267
 268 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_pwr
 269 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_pwr
 270 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_pwr
 271 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_pwr
 272 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_pwr
 273 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_pwr
 274 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_pwr
 275 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_pwr
 276 Date:           October 2021
 277 KernelVersion:  5.16
 278 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 279 Description:    These files switching line cards power on and off.
 280                 Expected behavior:
 281                 When  lc{n}_pwr is written 1, related line card is powered
 282                 on, when written 0 - powered off.
 283
 284                 The files are read/write.
 285
 286 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_rst_mask
 287 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_rst_mask
 288 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_rst_mask
 289 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_rst_mask
 290 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_rst_mask
 291 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_rst_mask
 292 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_rst_mask
 293 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_rst_mask
 294 Date:           October 2021
 295 KernelVersion:  5.16
 296 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 297 Description:    These files clear line card reset bit enforced by ASIC, when it
 298                 sets it due to some abnormal ASIC behavior.
 299                 Expected behavior:
 300                 When lc{n}_rst_mask is written 1, related line card reset bit
 301                 is cleared, when written 0 - no effect.
 302
 303                 The files are write only.
 304
 305 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/os_started
 306 Date:           October 2021
 307 KernelVersion:  5.16
 308 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 309 Description:    This file, when written 1, indicates to programmable devices
 310                 that OS is taking control over it.
 311
 312                 The file is read/write.
 313
 314 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pm_mgmt_en
 315 Date:           October 2021
 316 KernelVersion:  5.16
 317 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 318 Description:    This file assigns power management control ownership.
 319                 When power management control is provided by hardware, hardware
 320                 will automatically power off one or more line previously
 321                 powered line cards in case system power budget is getting
 322                 insufficient. It could be in case when some of power units lost
 323                 power good state.
 324                 When pm_mgmt_en is written 1, power management control by
 325                 software is enabled, 0 - power management control by hardware.
 326                 Note that for any setting of pm_mgmt_en attribute hardware will
 327                 not allow to power on any new line card in case system power
 328                 budget is insufficient.
 329                 Same in case software will try to power on several line cards
 330                 at once - hardware will power line cards while system has
 331                 enough power budget.
 332                 Default is 0.
 333
 334                 The file is read/write.
 335
 336 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu3_on
 337 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu4_on
 338 Date:           October 2021
 339 KernelVersion:  5.16
 340 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 341 Description:    These files switching power supply units on and off.
 342                 Expected behavior:
 343                 When  psu3_on or psu4_on is written 1, related unit will be
 344                 disconnected from the power source, when written 0 - connected.
 345
 346                 The files are write only.
 347
 348 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/shutdown_unlock
 349 Date:           October 2021
 350 KernelVersion:  5.16
 351 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 352 Description:    This file allows to unlock ASIC after thermal shutdown event.
 353                 When system thermal shutdown is enforced by ASIC, ASIC is
 354                 getting locked and after system boot it will not be available.
 355                 Software can decide to unlock it by setting this attribute to
 356                 1 and then perform system power cycle by setting pwr_cycle
 357                 attribute to 1 (power cycle of main power domain).
 358                 Before setting shutdown_unlock to 1 it is recommended to
 359                 validate that system reboot cause is reset_asic_thermal or
 360                 reset_thermal_spc_or_pciesw.
 361                 In case shutdown_unlock is not set 1, the only way to release
 362                 ASIC from locking - is full system power cycle through the
 363                 external power distribution unit.
 364                 Default is 1.
 365
 366                 The file is read/write.
 367
 368 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_pn
 369 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_version
 370 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_version_min
 371 Date:           October 2021
 372 KernelVersion:  5.16
 373 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 374 Description:    These files show with which CPLD major and minor versions
 375                 and part number has been burned CPLD device on line card.
 376
 377                 The files are read only.
 378
 379 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_pn
 380 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_version
 381 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_version_min
 382 Date:           October 2021
 383 KernelVersion:  5.16
 384 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 385 Description:    These files show with which FPGA major and minor versions
 386                 and part number has been burned FPGA device on line card.
 387
 388                 The files are read only.
 389
 390 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/vpd_wp
 391 Date:           October 2021
 392 KernelVersion:  5.16
 393 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 394 Description:    This file allow to overwrite line card VPD hardware write
 395                 protection mode. When attribute is set 1 - write protection is
 396                 disabled, when 0 - enabled.
 397                 Default is 0.
 398                 If the system is in locked-down mode writing this file will not
 399                 be allowed.
 400                 The purpose if this file is to allow line card VPD burning
 401                 during production flow.
 402
 403                 The file is read/write.
 404
 405 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_aux_pwr_or_ref
 406 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_dc_dc_pwr_fail
 407 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_fpga_not_done
 408 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_from_chassis
 409 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_line_card
 410 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_pwr_off_from_chassis
 411 Date:           October 2021
 412 KernelVersion:  5.16
 413 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 414 Description:    These files show the line reset cause, as following: power
 415                 auxiliary outage or power refresh, DC-to-DC power failure, FPGA reset
 416                 failed, line card reset failed, power off from chassis.
 417                 Value 1 in file means this is reset cause, 0 - otherwise. Only one of
 418                 the above causes could be 1 at the same time, representing only last
 419                 reset cause.
 420
 421                 The files are read only.
 422
 423 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld_upgrade_en
 424 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga_upgrade_en
 425 Date:           October 2021
 426 KernelVersion:  5.16
 427 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 428 Description:    These files allow CPLD and FPGA burning. Value 1 in file means burning
 429                 is enabled, 0 - otherwise.
 430                 If the system is in locked-down mode writing these files will
 431                 not be allowed.
 432                 The purpose of these files to allow line card CPLD and FPGA
 433                 upgrade through the JTAG daisy-chain.
 434
 435                 The files are read/write.
 436
 437 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/qsfp_pwr_en
 438 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/pwr_en
 439 Date:           October 2021
 440 KernelVersion:  5.16
 441 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 442 Description:    These files allow to power on/off all QSFP ports and whole line card.
 443                 The attributes are set 1 for power on, 0 - for power off.
 444
 445                 The files are read/write.
 446
 447 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/agb_spi_burn_en
 448 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga_spi_burn_en
 449 Date:           October 2021
 450 KernelVersion:  5.16
 451 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 452 Description:    These files allow gearboxes and FPGA SPI flash burning.
 453                 The attributes are set 1 to enable burning, 0 - to disable.
 454                 If the system is in locked-down mode writing these files will
 455                 not be allowed.
 456                 The purpose of these files to allow line card Gearboxes and FPGA
 457                 burning during production flow.
 458
 459                 The file is read/write.
 460
 461 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/max_power
 462 What:           /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/config
 463 Date:           October 2021
 464 KernelVersion:  5.16
 465 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 466 Description:    These files provide the maximum powered required for line card
 467                 feeding and line card configuration Id.
 468
 469                 The files are read only.
 470
 471 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/phy_reset
 472 Date:           May 2022
 473 KernelVersion:  5.19
 474 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 475 Description:    This file allows to reset PHY 88E1548 when attribute is set 0
 476                 due to some abnormal PHY behavior.
 477                 Expected behavior:
 478                 When phy_reset is written 1, all PHY 88E1548 are released
 479                 from the reset state, when 0 - are hold in reset state.
 480
 481                 The files are read/write.
 482
 483 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/mac_reset
 484 Date:           May 2022
 485 KernelVersion:  5.19
 486 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 487 Description:    This file allows to reset ASIC MT52132 when attribute is set 0
 488                 due to some abnormal ASIC behavior.
 489                 Expected behavior:
 490                 When mac_reset is written 1, the ASIC MT52132 is released
 491                 from the reset state, when 0 - is hold in reset state.
 492
 493                 The files are read/write.
 494
 495 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/qsfp_pwr_good
 496 Date:           May 2022
 497 KernelVersion:  5.19
 498 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 499 Description:    This file shows QSFP ports power status. The value is set to 0
 500                 when one of any QSFP ports is plugged. The value is set to 1 when
 501                 there are no any QSFP ports are plugged.
 502                 The possible values are:
 503                 0 - Power good, 1 - Not power good.
 504
 505                 The files are read only.
 506
 507 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic2_health
 508 Date:           July 2022
 509 KernelVersion:  5.20
 510 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 511 Description:    This file shows 2-nd ASIC health status. The possible values are:
 512                 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
 513
 514                 The file is read only.
 515
 516 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_reset
 517 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic2_reset
 518 Date:           July 2022
 519 KernelVersion:  5.20
 520 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 521 Description:    These files allow to each of ASICs by writing 1.
 522
 523                 The files are write only.
 524
 525 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/comm_chnl_ready
 526 Date:           July 2022
 527 KernelVersion:  5.20
 528 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 529 Description:    This file is used to indicate remote end (for example BMC) that system
 530                 host CPU is ready for sending telemetry data to remote end.
 531                 For indication the file should be written 1.
 532
 533                 The file is write only.
 534
 535 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config3
 536 Date:           January 2020
 537 KernelVersion:  5.6
 538 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 539 Description:    The file indicates COME module hardware configuration.
 540                 The value is pushed by hardware through GPIO pins.
 541                 The purpose is to expose some minor BOM changes for the same system SKU.
 542
 543                 The file is read only.
 544
 545 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_pwr_converter_fail
 546 Date:           February 2023
 547 KernelVersion:  6.3
 548 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 549 Description:    This file shows the system reset cause due to power converter
 550                 devices failure.
 551                 Value 1 in file means this is reset cause, 0 - otherwise.
 552
 553                 The file is read only.
 554
 555 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_ap_reset
 556 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_ap_reset
 557 Date:           February 2023
 558 KernelVersion:  6.3
 559 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 560 Description:    These files aim to monitor the status of the External Root of Trust (EROT)
 561                 processor's RESET output to the Application Processor (AP).
 562                 By reading this file, could be determined if the EROT has invalidated or
 563                 revoked AP Firmware, at which point it will hold the AP in RESET until a
 564                 valid firmware is loaded. This protects the AP from running an
 565                 unauthorized firmware. In the normal flow, the AP reset should be released
 566                 after the EROT validates the integrity of the FW, and it should be done so
 567                 as quickly as possible so that the AP boots before the CPU starts to
 568                 communicate to each ASIC.
 569
 570                 The files are read only.
 571
 572 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_recovery
 573 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_recovery
 574 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_reset
 575 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_reset
 576 Date:           February 2023
 577 KernelVersion:  6.3
 578 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 579 Description:    These files aim to perform External Root of Trust (EROT) recovery
 580                 sequence after EROT device failure.
 581                 These EROT devices protect ASICs from unauthorized access and in normal
 582                 flow their reset should be released with system power – earliest power
 583                 up stage, so that EROTs can begin boot and authentication process before
 584                 CPU starts to communicate to ASICs.
 585                 Issuing a reset to the EROT while asserting the recovery signal will cause
 586                 the EROT Application Processor to enter recovery mode so that the EROT FW
 587                 can be updated/recovered.
 588                 For reset/recovery the related file should be toggled by 1/0.
 589
 590                 The files are read/write.
 591
 592 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_wp
 593 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_wp
 594 Date:           February 2023
 595 KernelVersion:  6.3
 596 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 597 Description:    These files allow access to External Root of Trust (EROT) for reset
 598                 and recovery sequence after EROT device failure.
 599                 Default is 0 (programming disabled).
 600                 If the system is in locked-down mode writing this file will not be allowed.
 601
 602                 The files are read/write.
 603
 604 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/spi_chnl_select
 605 Date:           February 2023
 606 KernelVersion:  6.3
 607 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 608 Description:    This file allows SPI chip selection for External Root of Trust (EROT)
 609                 device Out-of-Band recovery.
 610                 File can be written with 0 or with 1. It selects which EROT can be accessed
 611                 through SPI device.
 612
 613                 The file is read/write.
 614
 615 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_pg_fail
 616 Date:           February 2023
 617 KernelVersion:  6.3
 618 Contact:        Vadim Pasternak vadimp@nvidia.com
 619 Description:    This file shows ASIC Power Good status.
 620                 Value 1 in file means ASIC Power Good failed, 0 - otherwise.
 621
 622                 The file is read only.
 623
 624 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd1_boot_fail
 625 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd2_boot_fail
 626 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_fail
 627 Date:           February 2023
 628 KernelVersion:  6.3
 629 Contact:        Vadim Pasternak vadimp@nvidia.com
 630 Description:    These files are related to clock boards status in system.
 631                 - clk_brd1_boot_fail: warning about 1-st clock board failed to boot from CI.
 632                 - clk_brd2_boot_fail: warning about 2-nd clock board failed to boot from CI.
 633                 - clk_brd_fail: error about common clock board boot failure.
 634
 635                 The files are read only.
 636
 637 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_prog_en
 638 Date:           February 2023
 639 KernelVersion:  6.3
 640 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 641 Description:    This file enables programming of clock boards.
 642                 Default is 0 (programming disabled).
 643                 If the system is in locked-down mode writing this file will not be allowed.
 644
 645                 The file is read/write.
 646
 647 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_converter_prog_en
 648 Date:           February 2023
 649 KernelVersion:  6.3
 650 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 651 Description:    This file enables programming of power converters.
 652                 Default is 0 (programming disabled).
 653                 If the system is in locked-down mode writing this file will not be allowed.
 654
 655                 The file is read/write.
 656
 657 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_ac_ok_fail
 658 Date:           February 2023
 659 KernelVersion:  6.3
 660 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 661 Description:    This file shows the system reset cause due to AC power failure.
 662                 Value 1 in file means this is reset cause, 0 - otherwise.
 663
 664                 The file is read only.
 665
 666 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn
 667 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version
 668 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min
 669 Date:           August 2023
 670 KernelVersion:  6.6
 671 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 672 Description:    These files show with which CPLD part numbers, version and minor
 673                 versions have been burned the 5-th CPLD device equipped on a
 674                 system.
 675
 676                 The files are read only.
 677
 678 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap
 679 Date:           August 2023
 680 KernelVersion:  6.6
 681 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 682 Description:    This file indicates the available method of CPLD/FPGA devices
 683                 field update through the JTAG chain:
 684
 685                 b00 - field update through LPC bus register memory space.
 686                 b01 - Reserved.
 687                 b10 - Reserved.
 688                 b11 - field update through CPU GPIOs bit-banging.
 689
 690                 The file is read only.
 691
 692 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open
 693 Date:           August 2023
 694 KernelVersion:  6.6
 695 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 696 Description:    1 - indicates that system lid is opened, otherwise 0.
 697
 698                 The file is read only.
 699
 700 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb
 701 Date:           August 2023
 702 KernelVersion:  6.6
 703 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 704 Description:    This file if set 1 indicates that system has been reset by
 705                 long press of power button.
 706
 707                 The file is read only.
 708
 709 What:           /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail
 710 Date:           August 2023
 711 KernelVersion:  6.6
 712 Contact:        Vadim Pasternak <vadimp@nvidia.com>
 713 Description:    This file shows 1 in case the system reset happened due to the
 714                 failure of any DC-DC power converter devices equipped on the
 715                 switch board.
 716
 717                 The file is read only.