1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1995 Linus Torvalds
4 * Adapted from 'alpha' version by Gary Thomas
5 * Modified by Cort Dougan (cort@cs.nmt.edu)
6 * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
7 * Further modified for generic 8xx by Dan.
11 * bootup setup stuff..
14 #include <linux/kernel.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/time.h>
18 #include <linux/rtc.h>
19 #include <linux/fsl_devices.h>
21 #include <linux/of_irq.h>
24 #include <asm/8xx_immap.h>
25 #include <mm/mmu_decl.h>
31 /* A place holder for time base interrupts, if they are ever enabled. */
32 static irqreturn_t timebase_interrupt(int irq, void *dev)
34 printk ("timebase_interrupt()\n");
39 static int __init get_freq(char *name, unsigned long *val)
41 struct device_node *cpu;
42 const unsigned int *fp;
45 /* The cpu node should have timebase and clock frequency properties */
46 cpu = of_get_cpu_node(0, NULL);
49 fp = of_get_property(cpu, name, NULL);
61 /* The decrementer counts at the system (internal) clock frequency divided by
62 * sixteen, or external oscillator divided by four. We force the processor
63 * to use system clock divided by sixteen.
65 void __init mpc8xx_calibrate_decr(void)
67 struct device_node *cpu;
70 /* Unlock the SCCR. */
71 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
72 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY);
74 /* Force all 8xx processors to use divide by 16 processor clock. */
75 setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000);
77 /* Processor frequency is MHz.
79 ppc_proc_freq = 50000000;
80 if (!get_freq("clock-frequency", &ppc_proc_freq))
81 printk(KERN_ERR "WARNING: Estimating processor frequency "
84 ppc_tb_freq = ppc_proc_freq / 16;
85 printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
87 /* Perform some more timer/timebase initialization. This used
88 * to be done elsewhere, but other changes caused it to get
89 * called more than once....that is a bad thing.
91 * First, unlock all of the registers we are going to modify.
92 * To protect them from corruption during power down, registers
93 * that are maintained by keep alive power are "locked". To
94 * modify these registers we have to write the key value to
95 * the key location associated with the register.
96 * Some boards power up with these unlocked, while others
97 * are locked. Writing anything (including the unlock code?)
98 * to the unlocked registers will lock them again. So, here
99 * we guarantee the registers are locked, then we unlock them
102 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
103 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
104 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY);
105 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY);
106 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY);
107 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY);
109 /* Disable the RTC one second and alarm interrupts. */
110 clrbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
113 setbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
115 /* Enabling the decrementer also enables the timebase interrupts
116 * (or from the other point of view, to get decrementer interrupts
117 * we have to enable the timebase). The decrementer interrupt
118 * is wired into the vector table, nothing to do here for that.
120 cpu = of_get_cpu_node(0, NULL);
121 virq= irq_of_parse_and_map(cpu, 0);
123 irq = virq_to_hw(virq);
125 out_be16(&mpc8xx_immr->im_sit.sit_tbscr,
126 ((1 << (7 - (irq / 2))) << 8) | (TBSCR_TBF | TBSCR_TBE));
128 if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint",
130 panic("Could not allocate timer IRQ!");
133 /* The RTC on the MPC8xx is an internal register.
134 * We want to protect this during power down, so we need to unlock,
135 * modify, and re-lock.
138 int mpc8xx_set_rtc_time(struct rtc_time *tm)
142 time = rtc_tm_to_time64(tm);
144 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY);
145 out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time);
146 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY);
151 void mpc8xx_get_rtc_time(struct rtc_time *tm)
155 /* Get time from the RTC. */
156 data = in_be32(&mpc8xx_immr->im_sit.sit_rtc);
157 rtc_time64_to_tm(data, tm);
161 void __noreturn mpc8xx_restart(char *cmd)
165 setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080);
166 /* Clear the ME bit in MSR to cause checkstop on machine check
168 mtmsr(mfmsr() & ~0x1000);
170 in_8(&mpc8xx_immr->im_clkrst.res[0]);
171 panic("Restart failed\n");