1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
5 * Author: Roy Zang <tie-fei.zang@freescale.com>
8 * P1023 RDB Board Setup
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/errno.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/fsl_devices.h>
19 #include <linux/of_address.h>
22 #include <asm/machdep.h>
23 #include <asm/pci-bridge.h>
24 #include <mm/mmu_decl.h>
29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/fsl_pci.h>
34 /* ************************************************************************
36 * Setup the architecture
39 static void __init p1023_rdb_setup_arch(void)
41 struct device_node *np;
44 ppc_md.progress("p1023_rdb_setup_arch()", 0);
47 np = of_find_node_by_name(NULL, "bcsr");
49 static u8 __iomem *bcsr_regs;
51 bcsr_regs = of_iomap(np, 0);
56 "BCSR: Failed to map bcsr register space\n");
59 #define BCSR15_I2C_BUS0_SEG_CLR 0x07
60 #define BCSR15_I2C_BUS0_SEG2 0x02
62 * Note: Accessing exclusively i2c devices.
64 * The i2c controller selects initially ID EEPROM in the u-boot;
65 * but if menu configuration selects RTC support in the kernel,
66 * the i2c controller switches to select RTC chip in the kernel.
68 #ifdef CONFIG_RTC_CLASS
69 /* Enable RTC chip on the segment #2 of i2c */
70 clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
71 setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
80 fsl_pci_assign_primary();
83 machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
85 static void __init p1023_rdb_pic_init(void)
87 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
96 define_machine(p1023_rdb) {
98 .compatible = "fsl,P1023RDB",
99 .setup_arch = p1023_rdb_setup_arch,
100 .init_IRQ = p1023_rdb_pic_init,
101 .get_irq = mpic_get_irq,
102 .progress = udbg_progress,
104 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
105 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,