8250/8250_tegra.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Serial Port driver for Tegra devices
   4  *
   5  *  Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
   6  */
   7
   8 #include <linux/acpi.h>
   9 #include <linux/clk.h>
  10 #include <linux/console.h>
  11 #include <linux/delay.h>
  12 #include <linux/io.h>
  13 #include <linux/module.h>
  14 #include <linux/reset.h>
  15 #include <linux/slab.h>
  16
  17 #include "8250.h"
  18
  19 struct tegra_uart {
  20         struct clk *clk;
  21         struct reset_control *rst;
  22         int line;
  23 };
  24
  25 static void tegra_uart_handle_break(struct uart_port *p)
  26 {
  27         unsigned int status, tmout = 10000;
  28
  29         do {
  30                 status = p->serial_in(p, UART_LSR);
  31                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  32                         status = p->serial_in(p, UART_RX);
  33                 else
  34                         break;
  35                 if (--tmout == 0)
  36                         break;
  37                 udelay(1);
  38         } while (1);
  39 }
  40
  41 static int tegra_uart_probe(struct platform_device *pdev)
  42 {
  43         struct uart_8250_port port8250;
  44         struct tegra_uart *uart;
  45         struct uart_port *port;
  46         struct resource *res;
  47         int ret;
  48
  49         uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
  50         if (!uart)
  51                 return -ENOMEM;
  52
  53         memset(&port8250, 0, sizeof(port8250));
  54
  55         port = &port8250.port;
  56         spin_lock_init(&port->lock);
  57
  58         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
  59                       UPF_FIXED_TYPE;
  60         port->iotype = UPIO_MEM32;
  61         port->regshift = 2;
  62         port->type = PORT_TEGRA;
  63         port->irqflags |= IRQF_SHARED;
  64         port->dev = &pdev->dev;
  65         port->handle_break = tegra_uart_handle_break;
  66
  67         ret = of_alias_get_id(pdev->dev.of_node, "serial");
  68         if (ret >= 0)
  69                 port->line = ret;
  70
  71         ret = platform_get_irq(pdev, 0);
  72         if (ret < 0)
  73                 return ret;
  74
  75         port->irq = ret;
  76
  77         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  78         if (!res)
  79                 return -ENODEV;
  80
  81         port->membase = devm_ioremap(&pdev->dev, res->start,
  82                                      resource_size(res));
  83         if (!port->membase)
  84                 return -ENOMEM;
  85
  86         port->mapbase = res->start;
  87         port->mapsize = resource_size(res);
  88
  89         uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
  90         if (IS_ERR(uart->rst))
  91                 return PTR_ERR(uart->rst);
  92
  93         if (device_property_read_u32(&pdev->dev, "clock-frequency",
  94                                      &port->uartclk)) {
  95                 uart->clk = devm_clk_get(&pdev->dev, NULL);
  96                 if (IS_ERR(uart->clk)) {
  97                         dev_err(&pdev->dev, "failed to get clock!\n");
  98                         return -ENODEV;
  99                 }
 100
 101                 ret = clk_prepare_enable(uart->clk);
 102                 if (ret < 0)
 103                         return ret;
 104
 105                 port->uartclk = clk_get_rate(uart->clk);
 106         }
 107
 108         ret = reset_control_deassert(uart->rst);
 109         if (ret)
 110                 goto err_clkdisable;
 111
 112         ret = serial8250_register_8250_port(&port8250);
 113         if (ret < 0)
 114                 goto err_ctrl_assert;
 115
 116         platform_set_drvdata(pdev, uart);
 117         uart->line = ret;
 118
 119         return 0;
 120
 121 err_ctrl_assert:
 122         reset_control_assert(uart->rst);
 123 err_clkdisable:
 124         clk_disable_unprepare(uart->clk);
 125
 126         return ret;
 127 }
 128
 129 static int tegra_uart_remove(struct platform_device *pdev)
 130 {
 131         struct tegra_uart *uart = platform_get_drvdata(pdev);
 132
 133         serial8250_unregister_port(uart->line);
 134         reset_control_assert(uart->rst);
 135         clk_disable_unprepare(uart->clk);
 136
 137         return 0;
 138 }
 139
 140 #ifdef CONFIG_PM_SLEEP
 141 static int tegra_uart_suspend(struct device *dev)
 142 {
 143         struct tegra_uart *uart = dev_get_drvdata(dev);
 144         struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
 145         struct uart_port *port = &port8250->port;
 146
 147         serial8250_suspend_port(uart->line);
 148
 149         if (!uart_console(port) || console_suspend_enabled)
 150                 clk_disable_unprepare(uart->clk);
 151
 152         return 0;
 153 }
 154
 155 static int tegra_uart_resume(struct device *dev)
 156 {
 157         struct tegra_uart *uart = dev_get_drvdata(dev);
 158         struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
 159         struct uart_port *port = &port8250->port;
 160
 161         if (!uart_console(port) || console_suspend_enabled)
 162                 clk_prepare_enable(uart->clk);
 163
 164         serial8250_resume_port(uart->line);
 165
 166         return 0;
 167 }
 168 #endif
 169
 170 static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend,
 171                          tegra_uart_resume);
 172
 173 static const struct of_device_id tegra_uart_of_match[] = {
 174         { .compatible = "nvidia,tegra20-uart", },
 175         { },
 176 };
 177 MODULE_DEVICE_TABLE(of, tegra_uart_of_match);
 178
 179 static const struct acpi_device_id tegra_uart_acpi_match[] = {
 180         { "NVDA0100", 0 },
 181         { },
 182 };
 183 MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match);
 184
 185 static struct platform_driver tegra_uart_driver = {
 186         .driver = {
 187                 .name = "tegra-uart",
 188                 .pm = &tegra_uart_pm_ops,
 189                 .of_match_table = tegra_uart_of_match,
 190                 .acpi_match_table = ACPI_PTR(tegra_uart_acpi_match),
 191         },
 192         .probe = tegra_uart_probe,
 193         .remove = tegra_uart_remove,
 194 };
 195
 196 module_platform_driver(tegra_uart_driver);
 197
 198 MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
 199 MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
 200 MODULE_LICENSE("GPL v2");