X-Git-Url: https://jxself.org/git/?p=open-ath9k-htc-firmware.git;a=blobdiff_plain;f=target_firmware%2Fwlan%2Fif_owl.c;h=35b037c471a85667be03779cd3f724a8bcad0e1e;hp=39a48c2db29f09b05bfda9852b84c2bf0d1ec8fa;hb=24b5105e0730aaeffb8a7b0b6b0d93eec6190b86;hpb=eaacae6cedaf752150758b9baa0917e1deb1a99f diff --git a/target_firmware/wlan/if_owl.c b/target_firmware/wlan/if_owl.c index 39a48c2..35b037c 100755 --- a/target_firmware/wlan/if_owl.c +++ b/target_firmware/wlan/if_owl.c @@ -47,7 +47,6 @@ #include #include -#include "if_ethersubr.h" #include "if_llc.h" #ifdef USE_HEADERLEN_RESV @@ -58,7 +57,7 @@ #include "if_athrate.h" #include "if_athvar.h" #include "ah_desc.h" -#include "if_ath_pci.h" +#include "ah_internal.h" #define ath_tgt_free_skb adf_nbuf_free @@ -97,7 +96,7 @@ static a_uint16_t bits_per_symbol[][2] = { void owltgt_tx_processq(struct ath_softc_tgt *sc, struct ath_txq *txq, owl_txq_state_t txqstate); static void ath_tgt_txqaddbuf(struct ath_softc_tgt *sc, struct ath_txq *txq, - struct ath_buf *bf, struct ath_desc *lastds); + struct ath_tx_buf *bf, struct ath_tx_desc *lastds); void ath_rate_findrate_11n_Hardcoded(struct ath_softc_tgt *sc, struct ath_rc_series series[]); void ath_buf_set_rate_Hardcoded(struct ath_softc_tgt *sc, @@ -106,12 +105,10 @@ static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, ath_data_hdr_t *dh); static void ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf); static void ath_tx_uc_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf); -static void ath_update_stats(struct ath_softc_tgt *sc, struct ath_buf *bf); +static void ath_update_stats(struct ath_softc_tgt *sc, struct ath_tx_buf *bf); void adf_print_buf(adf_nbuf_t buf); static void ath_tgt_tx_enqueue(struct ath_txq *txq, struct ath_atx_tid *tid); -struct ath_buf * ath_tgt_tx_prepare(struct ath_softc_tgt *sc, - adf_nbuf_t skb, ath_data_hdr_t *dh); void ath_tgt_tx_comp_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf); struct ieee80211_frame *ATH_SKB_2_WH(adf_nbuf_t skb); @@ -120,12 +117,9 @@ void ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf); static void ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, ath_atx_tid_t *tid); static void ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid); -static struct ath_node_target * owltarget_findnode(struct tx_frame_heade *dh, - struct ath_softc_tgt *sc, - struct adf_nbuf_t *skb); extern a_int32_t ath_chainmask_sel_logic(void *); -static a_int32_t ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen); -static void ath_tgt_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); +static a_int32_t ath_get_pktlen(struct ath_tx_buf *bf, a_int32_t hdrlen); +static void ath_tgt_txq_schedule(struct ath_softc_tgt *sc, struct ath_txq *txq); typedef void (*ath_ft_set_atype_t)(struct ath_softc_tgt *sc, struct ath_buf *bf); @@ -138,7 +132,7 @@ static void ath_tx_update_baw(ath_atx_tid_t *tid, int seqno); static void ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, - ath_bufhead *bf_q, struct ath_tx_buf **bar); + ath_tx_bufhead *bf_q, struct ath_tx_buf **bar); static void ath_tx_comp_aggr_error(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, ath_atx_tid_t *tid); @@ -154,6 +148,8 @@ static void ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) int ath_tgt_tx_add_to_aggr(struct ath_softc_tgt *sc, struct ath_buf *bf,int datatype, ath_atx_tid_t *tid, int is_burst); +int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid, + ath_tx_bufhead *bf_q); struct ieee80211_frame *ATH_SKB_2_WH(adf_nbuf_t skb) { @@ -225,7 +221,7 @@ static a_uint32_t ath_pkt_duration(struct ath_softc_tgt *sc, return duration; } -static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_buf *bf) +static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { adf_nbuf_t skb = bf->bf_skb; @@ -233,7 +229,7 @@ static void ath_dma_map(struct ath_softc_tgt *sc, struct ath_buf *bf) adf_nbuf_map(sc->sc_dev, bf->bf_dmamap, skb, ADF_OS_DMA_TO_DEVICE); } -static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_buf *bf) +static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { adf_nbuf_t skb = bf->bf_skb; @@ -243,7 +239,8 @@ static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_buf *bf) static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - struct ath_desc *ds0, *ds = bf->bf_desc; + struct ath_tx_desc *ds0, *ds = bf->bf_desc; + struct ath_hal *ah = sc->sc_ah; a_uint8_t i; ds0 = ds; @@ -259,7 +256,7 @@ static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) } else ds->ds_link = ATH_BUF_GET_DESC_PHY_ADDR_WITH_IDX(bf, i+1); - ath_hal_filltxdesc(sc->sc_ah, ds + ah->ah_fillTxDesc(ds , bf->bf_dmamap_info.dma_segs[i].len , i == 0 , i == (bf->bf_dmamap_info.nsegs - 1) @@ -269,10 +266,8 @@ static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - struct ath_desc *ds0, *ds = bf->bf_desc; - adf_nbuf_t skb; - adf_nbuf_queue_t skbhead; - a_int32_t i, dscnt = 0; + struct ath_tx_desc *ds = bf->bf_desc; + struct ath_hal *ah = sc->sc_ah; switch (bf->bf_protmode) { case IEEE80211_PROT_RTSCTS: @@ -285,7 +280,7 @@ static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) break; } - ath_hal_set11n_txdesc(sc->sc_ah, ds + ah->ah_set11nTxDesc(ds , bf->bf_pktlen , bf->bf_atype , 60 @@ -296,7 +291,7 @@ static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) ath_filltxdesc(sc, bf); } -static struct ath_buf *ath_buf_toggle(struct ath_softc_tgt *sc, +static struct ath_tx_buf *ath_buf_toggle(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, a_uint8_t retry) { @@ -376,12 +371,10 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { struct ath_hal *ah = sc->sc_ah; const HAL_RATE_TABLE *rt; - struct ath_desc *ds = bf->bf_desc; + struct ath_tx_desc *ds = bf->bf_desc; HAL_11N_RATE_SERIES series[4]; a_int32_t i, flags; a_uint8_t rix, cix, rtsctsrate; - a_uint32_t aggr_limit_with_rts; - a_uint32_t ctsduration = 0; a_int32_t prot_mode = AH_FALSE; rt = sc->sc_currates; @@ -396,7 +389,7 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) cix = rt->info[sc->sc_protrix].controlRate; prot_mode = AH_TRUE; } else { - if (ath_hal_htsupported(ah) && (!bf->bf_ismcast)) + if (ath_hal_getcapability(ah, HAL_CAP_HT) && (!bf->bf_ismcast)) flags = HAL_TXDESC_RTSENA; for (i = 4; i--;) { @@ -408,13 +401,6 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) } } - ath_hal_getrtsaggrlimit(sc->sc_ah, &aggr_limit_with_rts); - - if (bf->bf_isaggr && aggr_limit_with_rts && - bf->bf_al > aggr_limit_with_rts) { - flags &= ~(HAL_TXDESC_RTSENA); - } - adf_os_mem_set(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4); for (i = 0; i < 4; i++) { @@ -460,8 +446,8 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) rtsctsrate = rt->info[cix].rateCode | (bf->bf_shpream ? rt->info[cix].shortPreamble : 0); - ath_hal_set11n_ratescenario(ah, ds, 1, - rtsctsrate, ctsduration, + ah->ah_set11nRateScenario(ds, 1, + rtsctsrate, series, 4, flags); } @@ -521,7 +507,7 @@ static void owl_tgt_tid_cleanup(struct ath_softc_tgt *sc, void owl_tgt_node_init(struct ath_node_target * an) { struct ath_atx_tid *tid; - int tidno, i; + int tidno; for (tidno = 0, tid = &an->tid[tidno]; tidno < WME_NUM_TID;tidno++, tid++) { tid->tidno = tidno; @@ -546,7 +532,7 @@ void ath_tx_status_clear(struct ath_softc_tgt *sc) } } -struct WMI_TXSTATUS_EVENT* ath_tx_status_get(struct ath_softc_tgt *sc) +static WMI_TXSTATUS_EVENT *ath_tx_status_get(struct ath_softc_tgt *sc) { WMI_TXSTATUS_EVENT *txs = NULL; int i; @@ -573,6 +559,8 @@ void ath_tx_status_update(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) if (txs == NULL) return; + txs->txstatus[txs->cnt].ts_flags = 0; + txs->txstatus[txs->cnt].cookie = bf->bf_cookie; txs->txstatus[txs->cnt].ts_rate = SM(bf->bf_endpt, ATH9K_HTC_TXSTAT_EPID); @@ -634,18 +622,17 @@ void ath_tx_status_send(struct ath_softc_tgt *sc) static void owltgt_tx_process_cabq(struct ath_softc_tgt *sc, struct ath_txq *txq) { - ath_hal_intrset(sc->sc_ah, sc->sc_imask & ~HAL_INT_SWBA); + struct ath_hal *ah = sc->sc_ah; + ah->ah_setInterrupts(ah, sc->sc_imask & ~HAL_INT_SWBA); owltgt_tx_processq(sc, txq, OWL_TXQ_ACTIVE); - ath_hal_intrset(sc->sc_ah, sc->sc_imask); + ah->ah_setInterrupts(ah, sc->sc_imask); } void owl_tgt_tx_tasklet(TQUEUE_ARG data) { struct ath_softc_tgt *sc = (struct ath_softc_tgt *)data; a_int32_t i; - a_uint32_t qcumask = ((1 << HAL_NUM_TX_QUEUES) - 1); struct ath_txq *txq; - ath_data_hdr_t *dh; ath_tx_status_clear(sc); @@ -668,6 +655,7 @@ void owltgt_tx_processq(struct ath_softc_tgt *sc, struct ath_txq *txq, { struct ath_tx_buf *bf; struct ath_tx_desc *ds; + struct ath_hal *ah = sc->sc_ah; HAL_STATUS status; for (;;) { @@ -680,7 +668,7 @@ void owltgt_tx_processq(struct ath_softc_tgt *sc, struct ath_txq *txq, bf = asf_tailq_first(&txq->axq_q); ds = bf->bf_lastds; - status = ath_hal_txprocdesc(sc->sc_ah, ds); + status = ah->ah_procTxDesc(ah, ds); if (status == HAL_EINPROGRESS) { if (txqstate == OWL_TXQ_ACTIVE) @@ -741,7 +729,6 @@ static void ath_tgt_tx_comp_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node); - struct ath_desc *ds = bf->bf_lastds; ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno); if (tid->flag & TID_CLEANUP_INPROGRES) { @@ -759,7 +746,6 @@ static struct ieee80211_node_target * ath_tgt_find_node(struct ath_softc_tgt *sc a_int32_t node_index) { struct ath_node_target *an; - a_int32_t i; struct ieee80211_node_target *ni; if (node_index > TARGET_NODE_MAX) @@ -778,7 +764,7 @@ static struct ieee80211_node_target * ath_tgt_find_node(struct ath_softc_tgt *sc return NULL; } -static struct ath_buf* ath_buf_alloc(struct ath_softc_tgt *sc) +static struct ath_tx_buf* ath_tx_buf_alloc(struct ath_softc_tgt *sc) { struct ath_tx_buf *bf = NULL; @@ -793,13 +779,11 @@ static struct ath_buf* ath_buf_alloc(struct ath_softc_tgt *sc) return bf; } -struct ath_buf* ath_tgt_tx_prepare(struct ath_softc_tgt *sc, +struct ath_tx_buf* ath_tgt_tx_prepare(struct ath_softc_tgt *sc, adf_nbuf_t skb, ath_data_hdr_t *dh) { struct ath_tx_buf *bf; - struct ath_txq *txq; struct ieee80211_node_target *ni; - a_uint32_t flags = adf_os_ntohl(dh->flags); struct ath_atx_tid *tid; ni = ath_tgt_find_node(sc, dh->ni_index); @@ -812,7 +796,7 @@ struct ath_buf* ath_tgt_tx_prepare(struct ath_softc_tgt *sc, return NULL; } - bf = ath_buf_alloc(sc); + bf = ath_tx_buf_alloc(sc); if (!bf) { __stats(sc, tx_nobufs); return NULL; @@ -823,7 +807,7 @@ struct ath_buf* ath_tgt_tx_prepare(struct ath_softc_tgt *sc, bf->bf_keytype = dh->keytype; bf->bf_keyix = dh->keyix; bf->bf_protmode = dh->flags & (IEEE80211_PROT_RTSCTS | IEEE80211_PROT_CTSONLY); - bf->bf_node = (struct ath_node_target *)ni; + bf->bf_node = ni; adf_nbuf_queue_add(&bf->bf_skbhead, skb); skb = adf_nbuf_queue_first(&(bf->bf_skbhead)); @@ -868,8 +852,6 @@ static a_int32_t ath_key_setup(struct ieee80211_node_target *ni, struct ath_tx_buf *bf) { struct ieee80211_frame *wh = ATH_SKB_2_WH(bf->bf_skb); - const struct ieee80211_cipher *cip; - struct ieee80211_key *k; if (!(wh->i_fc[1] & IEEE80211_FC1_WEP)) { bf->bf_keytype = HAL_KEY_TYPE_CLEAR; @@ -902,31 +884,29 @@ static void ath_tgt_txq_add_ucast(struct ath_softc_tgt *sc, struct ath_tx_buf *b { struct ath_hal *ah = sc->sc_ah; struct ath_txq *txq; - struct ath_node_target *an; HAL_STATUS status; - static a_int32_t count = 0,i; volatile a_int32_t txe_val; adf_os_assert(bf); txq = bf->bf_txq; - status = ath_hal_txprocdesc(sc->sc_ah, bf->bf_lastds); + status = ah->ah_procTxDesc(ah, bf->bf_lastds); ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); if (txq->axq_link == NULL) { - ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); + ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); } else { *txq->axq_link = ATH_BUF_GET_DESC_PHY_ADDR(bf); - txe_val = OS_REG_READ(ah, 0x840); + txe_val = ioread32_mac(0x0840); if (!(txe_val & (1<< txq->axq_qnum))) - ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); + ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); } txq->axq_link = &bf->bf_lastds->ds_link; - ath_hal_txstart(ah, txq->axq_qnum); + ah->ah_startTxDma(ah, txq->axq_qnum); } static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc, @@ -934,12 +914,8 @@ static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc, ath_data_hdr_t *dh) { - struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node); struct ieee80211_frame *wh = ATH_SKB2_WH(bf->bf_skb); - struct ieee80211_node_target *ni = (struct ieee80211_node_target *)an; - struct ieee80211vap_target *vap = ni->ni_vap; - struct ieee80211com_target *ic = &sc->sc_ic; - a_int32_t retval, fragno = 0; + a_int32_t retval; a_uint32_t flags = adf_os_ntohl(dh->flags); ath_tgt_tx_seqno_normal(bf); @@ -964,7 +940,7 @@ static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc, } static a_int32_t -ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen) +ath_get_pktlen(struct ath_tx_buf *bf, a_int32_t hdrlen) { adf_nbuf_t skb = bf->bf_skb; a_int32_t pktlen; @@ -981,7 +957,7 @@ ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen) void ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - struct ath_node_target *an = bf->bf_node; + struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node); struct ath_rc_series rcs[4]; struct ath_rc_series mrcs[4]; a_int32_t shortPreamble = 0; @@ -994,14 +970,14 @@ ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) ath_tgt_rate_findrate(sc, an, shortPreamble, 0, 0, 0, 0, 0, rcs, &isProbe); - memcpy(bf->bf_rcs, rcs, sizeof(rcs)); + ath_hal_memcpy(bf->bf_rcs, rcs, sizeof(rcs)); } else { mrcs[1].tries = mrcs[2].tries = mrcs[3].tries = 0; mrcs[1].rix = mrcs[2].rix = mrcs[3].rix = 0; mrcs[0].rix = 0; mrcs[0].tries = 1; mrcs[0].flags = 0; - memcpy(bf->bf_rcs, mrcs, sizeof(mrcs)); + ath_hal_memcpy(bf->bf_rcs, mrcs, sizeof(mrcs)); } ath_buf_set_rate(sc, bf); @@ -1012,12 +988,13 @@ static void ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { a_int32_t i ; - struct ath_desc *bfd = NULL; + struct ath_tx_desc *bfd = NULL; + struct ath_hal *ah = sc->sc_ah; for (bfd = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; bfd++, i++) { - ath_hal_clr11n_aggr(sc->sc_ah, bfd); - ath_hal_set11n_burstduration(sc->sc_ah, bfd, 0); - ath_hal_set11n_virtualmorefrag(sc->sc_ah, bfd, 0); + ah->ah_clr11nAggr(bfd); + ah->ah_set11nBurstDuration(bfd, 0); + ah->ah_set11nVirtualMoreFrag(bfd, 0); } ath_dma_unmap(sc, bf); @@ -1046,13 +1023,10 @@ ath_tx_uc_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) } static void -ath_update_stats(struct ath_softc_tgt *sc, struct ath_buf *bf) +ath_update_stats(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - struct ieee80211_node_target *ni = bf->bf_node; struct ath_tx_desc *ds = bf->bf_desc; - struct ath_node_target *an = ATH_NODE_TARGET(ni); u_int32_t sr, lr; - struct ieee80211_cb *cb; if (ds->ds_txstat.ts_status == 0) { if (ds->ds_txstat.ts_rate & HAL_TXSTAT_ALTRATE) @@ -1082,9 +1056,9 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, struct ath_vap_target *avp; struct ath_hal *ah = sc->sc_ah; a_uint8_t rix, txrate, ctsrate, cix = 0xff, *data; - a_uint32_t ivlen = 0, icvlen = 0, subtype, flags, ctsduration, fval; + a_uint32_t subtype, flags, ctsduration; a_int32_t i, iswep, ismcast, hdrlen, pktlen, try0, len; - struct ath_desc *ds=NULL, *ds0=NULL; + struct ath_tx_desc *ds=NULL; struct ath_txq *txq=NULL; struct ath_tx_buf *bf; HAL_PKT_TYPE atype; @@ -1094,7 +1068,6 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, struct ath_rc_series rcs[4]; HAL_11N_RATE_SERIES series[4]; ath_mgt_hdr_t *mh; - struct ieee80211com_target *ic = &sc->sc_ic; a_int8_t keyix; if (!hdr_buf) { @@ -1232,20 +1205,16 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, flags |= HAL_TXDESC_INTREQ; - ath_hal_setuptxdesc(ah, ds + ah->ah_setupTxDesc(ds , pktlen , hdrlen , atype , 60 , txrate, try0 , keyix - , 0 , flags , ctsrate - , ctsduration - , icvlen - , ivlen - , ATH_COMP_PROC_NO_COMP_NO_CCS); + , ctsduration); bf->bf_flags = flags; @@ -1254,8 +1223,8 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, * in Auth frame 3 of Shared Authentication, owl needs this. */ if (iswep && (keyix != HAL_TXKEYIX_INVALID) && - (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == IEEE80211_FC0_SUBTYPE_AUTH) - ath_hal_fillkeytxdesc(ah, ds, mh->keytype); + (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == IEEE80211_FC0_SUBTYPE_AUTH) + ah->ah_fillKeyTxDesc(ds, mh->keytype); ath_filltxdesc(sc, bf); @@ -1265,7 +1234,7 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb, series[i].ChSel = sc->sc_ic.ic_tx_chainmask; series[i].RateFlags = 0; } - ath_hal_set11n_ratescenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0); + ah->ah_set11nRateScenario(ds, 0, ctsrate, series, 4, 0); ath_tgt_txqaddbuf(sc, txq, bf, bf->bf_lastds); return; @@ -1276,30 +1245,27 @@ fail: static void ath_tgt_txqaddbuf(struct ath_softc_tgt *sc, - struct ath_txq *txq, struct ath_buf *bf, - struct ath_desc *lastds) + struct ath_txq *txq, struct ath_tx_buf *bf, + struct ath_tx_desc *lastds) { struct ath_hal *ah = sc->sc_ah; ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); if (txq->axq_link == NULL) { - ath_hal_puttxbuf(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); + ah->ah_setTxDP(ah, txq->axq_qnum, ATH_BUF_GET_DESC_PHY_ADDR(bf)); } else { *txq->axq_link = ATH_BUF_GET_DESC_PHY_ADDR(bf); } txq->axq_link = &lastds->ds_link; - ath_hal_txstart(ah, txq->axq_qnum); + ah->ah_startTxDma(ah, txq->axq_qnum); } void ath_tgt_handle_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { ath_atx_tid_t *tid; struct ath_node_target *an; - struct ath_desc *ds; - struct ath_txq *txq = bf->bf_txq; - a_bool_t queue_frame; an = (struct ath_node_target *)bf->bf_node; adf_os_assert(an); @@ -1326,14 +1292,10 @@ ath_tgt_tx_enqueue(struct ath_txq *txq, struct ath_atx_tid *tid) } static void -ath_tgt_txq_schedule(struct ath_softc *sc, struct ath_txq *txq) +ath_tgt_txq_schedule(struct ath_softc_tgt *sc, struct ath_txq *txq) { struct ath_atx_tid *tid; u_int8_t bdone; - HAL_STATUS status; - u_int8_t smps_mode; - struct ieee80211_node *ieee_node; - u_int32_t aggr_limit_with_rts; bdone = AH_FALSE; @@ -1367,7 +1329,6 @@ ath_tgt_handle_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { ath_atx_tid_t *tid; struct ath_node_target *an; - struct ath_desc *ds; struct ath_txq *txq = bf->bf_txq; a_bool_t queue_frame, within_baw; @@ -1399,7 +1360,7 @@ ath_tgt_handle_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) static void ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) { - struct ath_buf *bf; + struct ath_tx_buf *bf; struct ath_txq *txq =TID_TO_ACTXQ(tid->tidno);; do { @@ -1418,9 +1379,10 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) { struct ath_tx_buf *bf, *bf_last; ATH_AGGR_STATUS status; - ath_bufhead bf_q; + ath_tx_bufhead bf_q; struct ath_txq *txq = TID_TO_ACTXQ(tid->tidno); - struct ath_desc *ds = NULL; + struct ath_tx_desc *ds = NULL; + struct ath_hal *ah = sc->sc_ah; int i; @@ -1439,7 +1401,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) break; bf = asf_tailq_first(&bf_q); - bf_last = asf_tailq_last(&bf_q, ath_bufhead_s); + bf_last = asf_tailq_last(&bf_q, ath_tx_bufhead_s); if (bf->bf_nframes == 1) { @@ -1451,7 +1413,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) bf->bf_next = NULL; for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++) - ath_hal_clr11n_aggr(sc->sc_ah, ds); + ah->ah_clr11nAggr(ds); ath_buf_set_rate(sc, bf); bf->bf_txq_add(sc, bf); @@ -1465,12 +1427,12 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid) bf->bf_isaggr = 1; ath_buf_set_rate(sc, bf); - ath_hal_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al, + ah->ah_set11nAggrFirst(bf->bf_desc, bf->bf_al, bf->bf_ndelim); bf->bf_lastds = bf_last->bf_lastds; for (i = 0; i < bf_last->bf_dmamap_info.nsegs; i++) - ath_hal_set11n_aggr_last(sc->sc_ah, &bf_last->bf_descarr[i]); + ah->ah_set11nAggrLast(&bf_last->bf_descarr[i]); if (status == ATH_AGGR_8K_LIMITED) { adf_os_assert(0); @@ -1532,12 +1494,13 @@ static u_int32_t ath_lookup_rate(struct ath_softc_tgt *sc, } int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid, - ath_bufhead *bf_q) + ath_tx_bufhead *bf_q) { struct ath_tx_buf *bf_first ,*bf_prev = NULL; int nframes = 0, rl = 0;; - struct ath_desc *ds = NULL; + struct ath_tx_desc *ds = NULL; struct ath_tx_buf *bf; + struct ath_hal *ah = sc->sc_ah; u_int16_t aggr_limit = (64*1024 -1), al = 0, bpad = 0, al_delta; u_int16_t h_baw = tid->baw_size/2, prev_al = 0, prev_frames = 0; @@ -1614,7 +1577,7 @@ int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid, bf_prev = bf; for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++) - ath_hal_set11n_aggr_middle(sc->sc_ah, ds, bf->bf_ndelim); + ah->ah_set11nAggrMiddle(ds, bf->bf_ndelim); } while (!asf_tailq_empty(&tid->buf_q)); @@ -1655,10 +1618,10 @@ void ath_tgt_tx_comp_aggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) int ba_index; int nbad = 0; int nframes = bf->bf_nframes; - struct ath_buf *bf_next; - ath_bufhead bf_q; + struct ath_tx_buf *bf_next; + ath_tx_bufhead bf_q; int tx_ok = 1; - struct ath_buf *bar = NULL; + struct ath_tx_buf *bar = NULL; struct ath_txq *txq; txq = bf->bf_txq; @@ -1738,12 +1701,12 @@ ath_tx_comp_aggr_error(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, struct ath_tx_desc lastds; - struct ath_desc *ds = &lastds; + struct ath_tx_desc *ds = &lastds; struct ath_rc_series rcs[4]; - struct ath_buf *bar = NULL; - struct ath_buf *bf_next; + struct ath_tx_buf *bar = NULL; + struct ath_tx_buf *bf_next; int nframes = bf->bf_nframes; - ath_bufhead bf_q; + ath_tx_bufhead bf_q; struct ath_txq *txq; asf_tailq_init(&bf_q); @@ -1786,7 +1749,7 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) int ba_index; int nbad = 0; int nframes = bf->bf_nframes; - struct ath_buf *bf_next; + struct ath_tx_buf *bf_next; int tx_ok = 1; adf_os_mem_copy(ds, bf->bf_lastds, sizeof (struct ath_tx_desc)); @@ -1837,20 +1800,21 @@ ath_tx_comp_cleanup(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) static void ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, - ath_bufhead *bf_q, struct ath_tx_buf **bar) + ath_tx_bufhead *bf_q, struct ath_tx_buf **bar) { struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node); ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno); - struct ath_desc *ds = NULL; + struct ath_tx_desc *ds = NULL; + struct ath_hal *ah = sc->sc_ah; int i = 0; __stats(sc, txaggr_compretries); for(ds = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; ds++, i++) { - ath_hal_clr11n_aggr(sc->sc_ah, ds); - ath_hal_set11n_burstduration(sc->sc_ah, ds, 0); - ath_hal_set11n_virtualmorefrag(sc->sc_ah, ds, 0); + ah->ah_clr11nAggr(ds); + ah->ah_set11nBurstDuration(ds, 0); + ah->ah_set11nVirtualMoreFrag(ds, 0); } if (bf->bf_retries >= OWLMAX_RETRIES) { @@ -1921,7 +1885,7 @@ ath_tx_comp_unaggr(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node); ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno); - struct ath_desc *ds = bf->bf_lastds; + struct ath_tx_desc *ds = bf->bf_lastds; ath_update_stats(sc, bf); ath_rate_tx_complete(sc, an, ds, bf->bf_rcs, 1, 0); @@ -2096,7 +2060,7 @@ static void ath_bar_retry(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) static void ath_bar_tx_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf) { - struct ath_desc *ds = bf->bf_lastds; + struct ath_tx_desc *ds = bf->bf_lastds; struct ath_node_target *an; ath_atx_tid_t *tid; struct ath_txq *txq; @@ -2122,7 +2086,8 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, adf_nbuf_t skb; struct ieee80211_frame_bar *bar; u_int8_t min_rate; - struct ath_desc *ds, *ds0; + struct ath_tx_desc *ds, *ds0; + struct ath_hal *ah = sc->sc_ah; HAL_11N_RATE_SERIES series[4]; int i = 0; adf_nbuf_queue_t skbhead; @@ -2131,7 +2096,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, __stats(sc, tx_bars); - memset(&series, 0, sizeof(series)); + adf_os_mem_set(&series, 0, sizeof(series)); ath_aggr_pause_tid(sc, tid); @@ -2164,7 +2129,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, adf_nbuf_dmamap_info(bf->bf_dmamap, &bf->bf_dmamap_info); ds = bf->bf_desc; - ath_hal_setuptxdesc(sc->sc_ah, ds + ah->ah_setupTxDesc(ds , adf_nbuf_len(skb) + IEEE80211_CRC_LEN , 0 , HAL_PKT_TYPE_NORMAL @@ -2172,18 +2137,16 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, , min_rate , ATH_TXMAXTRY , bf->bf_keyix - , 0 , HAL_TXDESC_INTREQ | HAL_TXDESC_CLRDMASK - , 0, 0, 0, 0 - , ATH_COMP_PROC_NO_COMP_NO_CCS); + , 0, 0); skbhead = bf->bf_skbhead; bf->bf_isaggr = 0; bf->bf_next = NULL; for (ds0 = ds, i=0; i < bf->bf_dmamap_info.nsegs; ds0++, i++) { - ath_hal_clr11n_aggr(sc->sc_ah, ds0); + ah->ah_clr11nAggr(ds0); } ath_filltxdesc(sc, bf); @@ -2194,6 +2157,6 @@ static void ath_bar_tx(struct ath_softc_tgt *sc, series[i].ChSel = sc->sc_ic.ic_tx_chainmask; } - ath_hal_set11n_ratescenario(sc->sc_ah, bf->bf_desc, 0, 0, 0, series, 4, 4); + ah->ah_set11nRateScenario(bf->bf_desc, 0, 0, series, 4, 4); ath_tgt_txq_add_ucast(sc, bf); }