5 #if defined(PROJECT_MAGPIE)
8 extern uint32_t *init_htc_handle;
9 uint8_t htc_complete_setup = 0;
10 void reset_EP4_FIFO(void);
14 void Magpie_init(void);
17 #if defined(PROJECT_MAGPIE)
18 extern BOOLEAN bEepromExist;
19 extern BOOLEAN bJumptoFlash;
22 static uint32_t loop_low, loop_high;
24 // reference idle count at the beginning
25 uint32_t idle_cnt = 0;
27 #if defined(PROJECT_K2)
28 // save the ROM printf function point
29 uint32_t save_cmnos_printf;
32 #define ATH_DATE_STRING __DATE__" "__TIME__
34 static void idle_task();
36 #if defined(PROJECT_MAGPIE)
37 void fatal_exception_func()
39 // patch for execption
40 (void)_xtos_set_exception_handler(EXCCAUSE_UNALIGNED, AR6002_fatal_exception_handler_patch);
41 (void)_xtos_set_exception_handler(EXCCAUSE_LOAD_STORE_ERROR, AR6002_fatal_exception_handler_patch);
42 (void)_xtos_set_exception_handler(EXCCAUSE_ILLEGAL, AR6002_fatal_exception_handler_patch);
43 (void)_xtos_set_exception_handler(EXCCAUSE_INSTR_ERROR, AR6002_fatal_exception_handler_patch);
44 (void)_xtos_set_exception_handler(EXCCAUSE_PRIVILEGED, AR6002_fatal_exception_handler_patch);
45 (void)_xtos_set_exception_handler(EXCCAUSE_INSTR_DATA_ERROR, AR6002_fatal_exception_handler_patch);
46 (void)_xtos_set_exception_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR, AR6002_fatal_exception_handler_patch);
47 (void)_xtos_set_exception_handler(EXCCAUSE_DIVIDE_BY_ZERO, AR6002_fatal_exception_handler_patch);
51 #if defined(PROJECT_MAGPIE)
53 change_magpie_clk(void)
55 volatile uint32_t i=0, rd_data;
57 HAL_WORD_REG_WRITE(0x00056004, 0x11);
58 rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1;
60 /* Wait for the update bit to get cleared */
62 rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1;
64 /* Put the PLL into reset */
65 rd_data = HAL_WORD_REG_READ(0x00050010) | (1<<1);
66 HAL_WORD_REG_WRITE(0x00050010,rd_data);
69 * XXX: statically set the CPU clock to 200Mhz
71 /* Setting of the PLL */
72 HAL_WORD_REG_WRITE(0x00056000, 0x325);//400 MHz
74 /* Pull CPU PLL out of Reset */
75 rd_data = HAL_WORD_REG_READ(0x00050010) & ~(1<<1);
76 HAL_WORD_REG_WRITE(0x00050010,rd_data);
78 A_DELAY_USECS(60); // wait for stable
80 /* CPU & AHB settings */
82 * AHB clk = ( CPU clk / 2 )
84 HAL_WORD_REG_WRITE(0x00056004, ((0x00001 | (1 << 16)|(1 << 8)))); // set plldiv to 2
85 rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1;
88 rd_data = HAL_WORD_REG_READ(0x00056004) & 0x1;
91 A_UART_HWINIT((100*1000*1000), 115200);
95 void exception_reset(struct register_dump_s *dump)
97 A_PRINTF("exception_reset \n");
99 /* phase I dump info */
100 A_PRINTF("exception reset-phase 1\n");
105 A_PRINTF("exception reset-phase 2\n");
106 *((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR) = WDT_MAGIC_PATTERN;
108 HAL_WORD_REG_WRITE(MAGPIE_REG_RST_RESET_ADDR,
109 HAL_WORD_REG_READ(MAGPIE_REG_RST_RESET_ADDR)|(BIT10|BIT8|BIT7|BIT6));
111 HAL_WORD_REG_WRITE(MAGPIE_REG_AHB_ARB_ADDR,
112 (HAL_WORD_REG_READ(MAGPIE_REG_AHB_ARB_ADDR)|BIT1));
114 HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x0);
115 HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)|BIT4);
117 HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)&~BIT4);
119 HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x1);
121 // set clock to bypass mode - 40Mhz from XTAL
122 HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, (BIT0|BIT4));
123 A_DELAY_USECS(100); // wait for stable
124 HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_ADDR, (BIT16));
126 A_UART_HWINIT((40*1000*1000), 115200);
128 A_PRINTF("do TX/RX swap\n");
130 MAGPIE_REG_USB_RX0_SWAP_DATA = 0x1;
131 MAGPIE_REG_USB_TX0_SWAP_DATA = 0x1;
132 MAGPIE_REG_USB_RX1_SWAP_DATA = 0x1;
133 MAGPIE_REG_USB_RX2_SWAP_DATA = 0x1;
135 A_PRINTF("Jump to BOOT\n");
141 void reset_EP4_FIFO(void)
146 USB_BYTE_REG_WRITE(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, (USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_HIGH_OFFSET) | BIT4));
147 for(i = 0; i < 100; i++) {}
148 USB_BYTE_REG_WRITE(ZM_EP4_BYTE_COUNT_HIGH_OFFSET, (USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_HIGH_OFFSET) & ~BIT4));
151 LOCAL void zfGenExceptionEvent(uint32_t exccause, uint32_t pc, uint32_t badvaddr)
153 uint32_t pattern = 0x33221199;
155 A_PRINTF("<Exception>Tgt Drv send an event 44332211 to Host Drv\n");
156 mUSB_STATUS_IN_INT_DISABLE();
158 USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f);
160 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pattern);
161 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, exccause);
162 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pc);
163 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, badvaddr);
165 mUSB_EP3_XFER_DONE();
168 LOCAL void zfGenWrongEpidEvent(uint32_t epid)
170 uint32_t pattern = 0x33221299;
172 A_PRINTF("<WrongEPID>Tgt Drv send an event 44332212 to Host Drv\n");
173 mUSB_STATUS_IN_INT_DISABLE();
175 USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x0f);
177 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, pattern);
178 USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, epid);
180 mUSB_EP3_XFER_DONE();
184 AR6002_fatal_exception_handler_patch(CPU_exception_frame_t *exc_frame)
186 struct register_dump_s dump;
187 void (*reset_func)(void) = (void*)(RESET_VECTOR_ADDRESS);
188 uint32_t exc_cause, exc_vaddr;
189 asm volatile("rsr %0,%1" : "=r" (exc_cause) : "n" (EXCCAUSE));
190 asm volatile("rsr %0,%1" : "=r" (exc_vaddr) : "n" (EXCVADDR));
192 dump.exc_frame = *exc_frame; /* structure copy */
193 dump.badvaddr = exc_vaddr;
194 dump.exc_frame.xt_exccause = exc_cause;
195 dump.pc = exc_frame->xt_pc;
198 zfGenExceptionEvent(dump.exc_frame.xt_exccause, dump.pc, dump.badvaddr);
200 #if SYSTEM_MODULE_PRINT
201 A_PRINTF("\nFatal exception (%d): \tpc=0x%x \n\r\tbadvaddr=0x%x \n\r\tdump area=0x%x\n",
202 dump.exc_frame.xt_exccause, dump.pc, dump.badvaddr, &dump);
203 PRINT_FAILURE_STATE();
205 A_PUTS("Fatal exception\n\r");
217 HTCControlSvcProcessMsg_patch(HTC_ENDPOINT_ID EndpointID, adf_nbuf_t hdr_buf,
218 adf_nbuf_t pBuffers, void *arg)
222 HTC_UNKNOWN_MSG *pMsg;
224 /* we assume buffers are aligned such that we can access the message
225 * parameters directly*/
226 adf_nbuf_peek_header(pBuffers, &anbdata, &anblen);
227 pMsg = (HTC_UNKNOWN_MSG *)anbdata;
229 if (pMsg->MessageID == HTC_MSG_SETUP_COMPLETE_ID) {
230 htc_complete_setup = 1;
233 HTCControlSvcProcessMsg(EndpointID, hdr_buf, pBuffers, arg);
236 /* Patch callback for check the endpoint ID is correct or not */
238 HTCMsgRecvHandler_patch(adf_nbuf_t hdr_buf, adf_nbuf_t buffer, void *context)
244 HTC_FRAME_HDR *pHTCHdr;
246 if (hdr_buf == ADF_NBUF_NULL) {
247 /* HTC hdr is not in the hdr_buf */
253 adf_nbuf_peek_header(tmp_nbuf, &anbdata, &anblen);
254 pHTCHdr = (HTC_FRAME_HDR *)anbdata;
256 eid = pHTCHdr->EndpointID;
258 if ((eid != 0) && (htc_complete_setup == 0)) {
259 A_PRINTF("\nHTC Hdr EndpointID = %d, anblen = %d\n", pHTCHdr->EndpointID, anblen);
260 A_PRINTF("HTC Hder : %2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x\n",
261 *anbdata, *(anbdata+1), *(anbdata+2), *(anbdata+3),
262 *(anbdata+4), *(anbdata+5), *(anbdata+6), *(anbdata+7),
263 *(anbdata+8), *(anbdata+9), *(anbdata+10), *(anbdata+11));
264 A_PRINTF("init_htc_handle = 0x%8x\n", init_htc_handle);
266 if (pHTCHdr->EndpointID == 1) {
267 A_PRINTF("Return WMI Command buffer\n");
268 HTC_ReturnBuffers(init_htc_handle, 1, tmp_nbuf);
269 } else if ((pHTCHdr->EndpointID == 5) || (pHTCHdr->EndpointID == 6)) {
270 A_PRINTF("Return Data buffer\n");
271 HTC_ReturnBuffers(init_htc_handle, 6, tmp_nbuf);
275 if ((pHTCHdr->EndpointID < 0) || (pHTCHdr->EndpointID >= ENDPOINT_MAX)) {
276 A_PRINTF("HTC Hdr EndpointID = %d, anblen = %d\n", pHTCHdr->EndpointID, anblen);
277 A_PRINTF("HTC Hder : %2x-%2x-%2x-%2x-%2x-%2x-%2x-%2x\n",
278 *anbdata, *(anbdata+1), *(anbdata+2), *(anbdata+3),
279 *(anbdata+4), *(anbdata+5), *(anbdata+6), *(anbdata+7));
282 A_PRINTF("EP1-Tx-Data with Wrong Htc Header Endpoint ID, WAR free this buffer\n");
283 HTC_ReturnBuffers(init_htc_handle, 6, tmp_nbuf);
284 A_PRINTF("EP1-Tx-Data > Free this buffer successfully\n");
286 A_PRINTF("EP4-WMI-Cmd with Wrong Htc Header Endpoint ID, WAR free this buffer\n");
287 zfGenWrongEpidEvent((a_uint32_t)pHTCHdr->EndpointID);
288 HTC_ReturnBuffers(init_htc_handle, 1, tmp_nbuf);
289 A_PRINTF("EP4-WMI-Cmd > Free this buffer successfully\n");
292 HTCMsgRecvHandler( hdr_buf, buffer, context);
300 uint32_t *temp = (uint32_t *)ALLOCRAM_START;
302 /* clear bss segment */
303 for(temp = (uint32_t *)&START_BSS; temp < (uint32_t *)&END_BSS; temp++)
306 /* clear heap segment */
307 for(i = 0; i < ((ALLOCRAM_SIZE - 4)/4); i++)
311 static void idle_task()
313 if (loop_low == 0xffffffff) {
324 loop_low=loop_high=0;
327 #if defined(PROJECT_MAGPIE)
329 bJumptoFlash = FALSE;
334 /* update wdt timer */
337 /* UPDATE cticks - to be moved to idle_tsk, put here will be easier to read */
340 HIF_isr_handler(NULL);
342 #if MAGPIE_ENABLE_WLAN == 1
349 /* Low priority tasks */
350 if ((loop_low & 0xf) == 0) {
353 /* Very low priority tasks */
354 if ((loop_low & 0xfff) == 0x7) {
355 if ((loop_low & 0x1000) == 0) {
365 #endif /* #if defined(_RAM_) */