X-Git-Url: https://jxself.org/git/?p=linux-libre-firmware.git;a=blobdiff_plain;f=ath9k_htc%2Ftarget_firmware%2Fmagpie_fw_dev%2Ftarget%2Finc%2Fk2%2Fintr_api.h;fp=ath9k_htc%2Ftarget_firmware%2Fmagpie_fw_dev%2Ftarget%2Finc%2Fk2%2Fintr_api.h;h=0000000000000000000000000000000000000000;hp=d15c1b4c17d37ee1b224f21b471cf9d338ffc31c;hb=1ba1a88647bfe113c885f985d6e383790dec2a1f;hpb=a2fe6b1f6253377c952c224d4ec9d55b196660ce diff --git a/ath9k_htc/target_firmware/magpie_fw_dev/target/inc/k2/intr_api.h b/ath9k_htc/target_firmware/magpie_fw_dev/target/inc/k2/intr_api.h deleted file mode 100755 index d15c1b4..0000000 --- a/ath9k_htc/target_firmware/magpie_fw_dev/target/inc/k2/intr_api.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2013 Qualcomm Atheros, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted (subject to the limitations in the - * disclaimer below) provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * * Neither the name of Qualcomm Atheros nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE - * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __INTR_API_H__ -#define __INTR_API_H__ - -/* - * Interrupt handler, for application-managed interrupts. - * When an interrupt occurs, it is automatically disabled. - * See A_WMAC_INTR_ATTACH() and A_MBOX_INTR_ATTACH(). - * - * If a handler returns A_HANDLER_DONE, the interrupt is - * re-enabled. The OS calls the handler next time service - * is required. This is the normal case for a handler. - * - * If a handler returns A_HANDLER_YIELD, the interrupt - * remains masked. The handler is called again when - * it is "convenient". This gives the OS an opportunity - * to run other code/handlers. A handler should return - * A_HANDLER_YIELD if it might dominate the CPU for too - * long. - * - * If a handler returns A_HANDLER_NOENABLE, the interrupt - * remains disabled. It is up to the application to re-enable - * the interrupt (via A_*_INTR_UNMASK) when it's appropriate. - * - * Note that many combinations of interrupt functions and - * interrupt vectors are NOT supported: Callers should use - * only the macros defined in cmnos_api.h to access the - * interrupt API. - */ -#include "cmnos_api.h" - -typedef uint32_t A_old_intr_t; - -////////////////////////////////////////////////////////////////// -// this is copied from mercury/cmnos_xtensa.h -/* - * These are CMNOS interrupt manifest constants. - * They have specially-chosen values that align with hardware and or - * operating system values (see cmnos_interrupt_info). - */ -#if defined(__XTENSA__) -/* - * Enumeration of low and medium priority interrupt numbers - * which match the CPU hardware configuration: - */ - -/* XTensa Level 1 interrupt */ -#define A_INUM_SOFTWARE 0 /* currently unused */ - -/* XTensa Level2 interrupts */ -#define A_INUM_XTTIMER 1 /* Tensilica timer */ -#define A_INUM_TBD_2 2 /* TBD */ -#define A_INUM_CPU_WDT 3 /* RST_CPU watchodg interrupt */ -#define A_INUM_TBD_4 4 /* TBD */ -#define A_INUM_TBD_5 5 /* TBD */ -#define A_INUM_TBD_6 6 /* TBD */ -#define A_INUM_CPU_GEN_TIMER 7 /* CPU general timer */ -#define A_INUM_TBD_8 8 /* TBD */ -#define A_INUM_TBD_9 9 /* TBD */ -#define A_INUM_USB_CTRL 10 /* USB core control */ -#define A_INUM_USB_DMA 11 /* USB DMA */ -#define A_INUM_TBD_12 12 /* TBD */ -#define A_INUM_TBD_13 13 /* TBD */ -#define A_INUM_TBD_14 14 /* TBD */ - -/* Level 3 interrupts */ -#define A_INUM_ERROR 15 /* Errors (e.g. access illegal address) */ -#define A_INUM_TBD_16 16 /* TBD */ -#define A_INUM_MAC 17 /* MAC */ - -/* Level 5 interrupts */ -#define A_INUM_CPU_NMI 18 /* CPU NMI */ - -/* Number of interrupts that map directly into CPU/hal interrupt bits. */ -#define NUM_DIRECT_INTR 19 - -#endif -////////////////////////////////////////////////////////////////// - -#define CMNOS_IMASK_XTTIMER (1<