From: Christian Lamparter Date: Thu, 22 Jul 2010 18:23:59 +0000 (+0200) Subject: carl9170 firmware: rename ^CARL*_MASK$ to ^CARL*$ X-Git-Tag: 1.7.2~3 X-Git-Url: https://jxself.org/git/?p=carl9170fw.git;a=commitdiff_plain;h=fa097d02ca1683946b2207c8ebf69538e8c3cb9c carl9170 firmware: rename ^CARL*_MASK$ to ^CARL*$ This synchronizes the usage of _MASK in HW defintions with ath9k and other Atheros' drivers. Signed-off-by: Christian Lamparter --- diff --git a/carlfw/include/dma.h b/carlfw/include/dma.h index 079b3b7..9913f3a 100644 --- a/carlfw/include/dma.h +++ b/carlfw/include/dma.h @@ -176,39 +176,40 @@ struct ar9170_dma_memory { extern struct ar9170_dma_memory dma_mem; -#define AR9170_DOWN_BLOCK_RATIO 2 -#define AR9170_RX_BLOCK_RATIO 1 +#define AR9170_DOWN_BLOCK_RATIO 2 +#define AR9170_RX_BLOCK_RATIO 1 /* Tx 16*2 = 32 packets => 32*(5*320) */ -#define AR9170_TX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \ - (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO)) -#define AR9170_RX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER) +#define AR9170_TX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \ + (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO)) +#define AR9170_RX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER) /* Error code */ -#define AR9170_ERR_FS_BIT 1 -#define AR9170_ERR_LS_BIT 2 -#define AR9170_ERR_OWN_BITS 3 -#define AR9170_ERR_DATA_SIZE 4 -#define AR9170_ERR_TOTAL_LEN 5 -#define AR9170_ERR_DATA 6 -#define AR9170_ERR_SEQ 7 -#define AR9170_ERR_LEN 8 +#define AR9170_ERR_FS_BIT 1 +#define AR9170_ERR_LS_BIT 2 +#define AR9170_ERR_OWN_BITS 3 +#define AR9170_ERR_DATA_SIZE 4 +#define AR9170_ERR_TOTAL_LEN 5 +#define AR9170_ERR_DATA 6 +#define AR9170_ERR_SEQ 7 +#define AR9170_ERR_LEN 8 /* Status bits definitions */ /* Own bits definitions */ -#define AR9170_OWN_BITS_MASK 0x3 -#define AR9170_OWN_BITS_SW 0x0 -#define AR9170_OWN_BITS_HW 0x1 -#define AR9170_OWN_BITS_SE 0x2 +#define AR9170_OWN_BITS 0x3 +#define AR9170_OWN_BITS_S 0 +#define AR9170_OWN_BITS_SW 0x0 +#define AR9170_OWN_BITS_HW 0x1 +#define AR9170_OWN_BITS_SE 0x2 /* Control bits definitions */ #define AR9170_CTRL_TXFAIL 1 #define AR9170_CTRL_BAFAIL 2 -#define AR9170_CTRL_FAIL_MASK (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL) +#define AR9170_CTRL_FAIL (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL) /* First segament bit */ -#define AR9170_CTRL_LS_BIT 0x100 +#define AR9170_CTRL_LS_BIT 0x100 /* Last segament bit */ -#define AR9170_CTRL_FS_BIT 0x200 +#define AR9170_CTRL_FS_BIT 0x200 struct dma_queue { struct dma_desc *head; @@ -240,7 +241,7 @@ static inline __inline struct dma_desc *dma_dequeue_bits(struct dma_queue *q, { struct dma_desc *desc = NULL; - if ((q->head->status & AR9170_OWN_BITS_MASK) == bits) + if ((q->head->status & AR9170_OWN_BITS) == bits) desc = dma_unlink_head(q); return desc; @@ -252,7 +253,7 @@ static inline __inline struct dma_desc *dma_dequeue_not_bits(struct dma_queue *q struct dma_desc *desc = NULL; /* AR9170_OWN_BITS_HW will be filtered out here too. */ - if ((q->head->status & AR9170_OWN_BITS_MASK) != bits) + if ((q->head->status & AR9170_OWN_BITS) != bits) desc = dma_unlink_head(q); return desc; @@ -270,13 +271,13 @@ static inline __inline struct dma_desc *dma_dequeue_not_bits(struct dma_queue *q #define __for_each_desc_bits(desc, queue, bits) \ for (desc = (queue)->head; \ (desc != (queue)->terminator && \ - (desc->status & AR9170_OWN_BITS_MASK) == bits); \ + (desc->status & AR9170_OWN_BITS) == bits); \ desc = desc->lastAddr->nextAddr) #define __while_desc_bits(desc, queue, bits) \ for (desc = (queue)->head; \ (!queue_empty(queue) && \ - (desc->status & AR9170_OWN_BITS_MASK) == bits); \ + (desc->status & AR9170_OWN_BITS) == bits); \ desc = (queue)->head) #define __for_each_desc(desc, queue) \ @@ -311,7 +312,7 @@ static inline __inline unsigned int queue_len(struct dma_queue *q) static inline __inline void dma_rearm(struct dma_desc *desc) { /* Set OWN bit to HW */ - desc->status = ((desc->status & (~AR9170_OWN_BITS_MASK)) | + desc->status = ((desc->status & (~AR9170_OWN_BITS)) | AR9170_OWN_BITS_HW); } diff --git a/carlfw/include/wl.h b/carlfw/include/wl.h index 178679a..47dda50 100644 --- a/carlfw/include/wl.h +++ b/carlfw/include/wl.h @@ -97,7 +97,7 @@ static inline __inline uint8_t ar9170_get_rx_macstatus_error(struct dma_desc *de static inline __inline struct ieee80211_hdr *ar9170_get_rx_i3e(struct dma_desc *desc) { if (!((ar9170_get_rx_macstatus_status(desc) & - AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) { + AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) { return (void *)(DESC_PAYLOAD_OFF(desc, offsetof(struct ar9170_rx_frame_head, i3e))); } else { @@ -109,7 +109,7 @@ static inline __inline struct ieee80211_hdr *ar9170_get_rx_i3e(struct dma_desc * static inline __inline struct ar9170_rx_head *ar9170_get_rx_head(struct dma_desc *desc) { if (!((ar9170_get_rx_macstatus_status(desc) & - AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) { + AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) { return (void *)((uint8_t *)DESC_PAYLOAD(desc) + offsetof(struct ar9170_rx_frame_head, phy_head)); } else { @@ -131,7 +131,7 @@ static inline __inline uint32_t ar9170_rx_to_phy(struct dma_desc *rx) mac_status = ar9170_get_rx_macstatus_status(rx); - phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION_MASK; + phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION; phy.chains = AR9170_TX_PHY_TXCHAIN_1; switch (phy.modulation) { @@ -190,7 +190,7 @@ static inline __inline unsigned int ar9170_get_rx_mpdu_len(struct dma_desc *desc mpdu_len -= sizeof(struct ar9170_rx_macstatus); - switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU_MASK) { + switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU) { case AR9170_RX_STATUS_MPDU_LAST: mpdu_len -= sizeof(struct ar9170_rx_phystatus); break; diff --git a/carlfw/src/dma.c b/carlfw/src/dma.c index 3da9f8c..2896032 100644 --- a/carlfw/src/dma.c +++ b/carlfw/src/dma.c @@ -192,7 +192,7 @@ void dma_reclaim(struct dma_queue *q, struct dma_desc *desc) desc->status = AR9170_OWN_BITS_SW; /* 5. Copy TTD to last TD */ - tdesc.status &= (~AR9170_OWN_BITS_MASK); + tdesc.status &= (~AR9170_OWN_BITS); copy_dma_desc((void *)q->terminator, (void *)&tdesc); q->terminator->status |= AR9170_OWN_BITS_HW; @@ -253,7 +253,7 @@ void dma_put(struct dma_queue *q, struct dma_desc *desc) desc->dataAddr = NULL; /* 5. Copy TTD to last TD */ - tdesc.status &= (~AR9170_OWN_BITS_MASK); + tdesc.status &= (~AR9170_OWN_BITS); copy_dma_desc((void *)q->terminator, (void *)&tdesc); q->terminator->status |= AR9170_OWN_BITS_HW; diff --git a/carlfw/src/wlan.c b/carlfw/src/wlan.c index 6278b58..1f4afa3 100644 --- a/carlfw/src/wlan.c +++ b/carlfw/src/wlan.c @@ -290,7 +290,7 @@ static bool wlan_tx_status(struct dma_queue *queue, success = true; - if (!!(desc->ctrl & AR9170_CTRL_FAIL_MASK)) { + if (!!(desc->ctrl & AR9170_CTRL_FAIL)) { txfail = !!(desc->ctrl & AR9170_CTRL_TXFAIL); /* reset retry indicator flags */ diff --git a/include/shared/fwcmd.h b/include/shared/fwcmd.h index 49fdb2f..c1879f5 100644 --- a/include/shared/fwcmd.h +++ b/include/shared/fwcmd.h @@ -185,11 +185,12 @@ struct carl9170_cmd { } __packed; } __packed; -#define CARL9170_TX_STATUS_QUEUE_MASK 3 -#define CARL9170_TX_STATUS_RIX_SHIFT 2 -#define CARL9170_TX_STATUS_RIX_MASK (3 << CARL9170_TX_STATUS_RIX_SHIFT) -#define CARL9170_TX_STATUS_TRIES_SHIFT 4 -#define CARL9170_TX_STATUS_TRIES_MASK (7 << CARL9170_TX_STATUS_TRIES_SHIFT) +#define CARL9170_TX_STATUS_QUEUE 3 +#define CARL9170_TX_STATUS_QUEUE_S 0 +#define CARL9170_TX_STATUS_RIX_S 2 +#define CARL9170_TX_STATUS_RIX (3 << CARL9170_TX_STATUS_RIX_S) +#define CARL9170_TX_STATUS_TRIES_S 4 +#define CARL9170_TX_STATUS_TRIES (7 << CARL9170_TX_STATUS_TRIES_S) #define CARL9170_TX_STATUS_SUCCESS 0x80 /* diff --git a/include/shared/wlan.h b/include/shared/wlan.h index 1fd3ab1..f859d89 100644 --- a/include/shared/wlan.h +++ b/include/shared/wlan.h @@ -56,7 +56,8 @@ #define AR9170_RX_ENC_SOFTWARE 0x8 -#define AR9170_RX_STATUS_MODULATION_MASK 0x03 +#define AR9170_RX_STATUS_MODULATION 0x03 +#define AR9170_RX_STATUS_MODULATION_S 0 #define AR9170_RX_STATUS_MODULATION_CCK 0x00 #define AR9170_RX_STATUS_MODULATION_OFDM 0x01 #define AR9170_RX_STATUS_MODULATION_HT 0x02 @@ -66,7 +67,8 @@ #define AR9170_RX_STATUS_SHORT_PREAMBLE 0x08 #define AR9170_RX_STATUS_GREENFIELD 0x08 -#define AR9170_RX_STATUS_MPDU_MASK 0x30 +#define AR9170_RX_STATUS_MPDU 0x30 +#define AR9170_RX_STATUS_MPDU_S 4 #define AR9170_RX_STATUS_MPDU_SINGLE 0x00 #define AR9170_RX_STATUS_MPDU_FIRST 0x20 #define AR9170_RX_STATUS_MPDU_MIDDLE 0x30