carl9170 firmware: rename ^CARL*_MASK$ to ^CARL*$
authorChristian Lamparter <chunkeey@googlemail.com>
Thu, 22 Jul 2010 18:23:59 +0000 (20:23 +0200)
committerChristian Lamparter <chunkeey@googlemail.com>
Thu, 22 Jul 2010 18:23:59 +0000 (20:23 +0200)
This synchronizes the usage of _MASK in HW defintions
with ath9k and other Atheros' drivers.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
carlfw/include/dma.h
carlfw/include/wl.h
carlfw/src/dma.c
carlfw/src/wlan.c
include/shared/fwcmd.h
include/shared/wlan.h

index 079b3b7f227d0d4849624bbc6603b968805036cc..9913f3a40359ce23ebf393730ab84b38b90b5ae0 100644 (file)
@@ -176,39 +176,40 @@ struct ar9170_dma_memory {
 
 extern struct ar9170_dma_memory dma_mem;
 
-#define AR9170_DOWN_BLOCK_RATIO     2
-#define AR9170_RX_BLOCK_RATIO       1
+#define AR9170_DOWN_BLOCK_RATIO        2
+#define AR9170_RX_BLOCK_RATIO  1
 /* Tx 16*2 = 32 packets => 32*(5*320) */
-#define AR9170_TX_BLOCK_NUMBER     (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \
-                                  (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO))
-#define AR9170_RX_BLOCK_NUMBER     (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER)
+#define AR9170_TX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER * AR9170_DOWN_BLOCK_RATIO / \
+                               (AR9170_RX_BLOCK_RATIO + AR9170_DOWN_BLOCK_RATIO))
+#define AR9170_RX_BLOCK_NUMBER (AR9170_BLOCK_NUMBER - AR9170_TX_BLOCK_NUMBER)
 
 /* Error code */
-#define AR9170_ERR_FS_BIT           1
-#define AR9170_ERR_LS_BIT           2
-#define AR9170_ERR_OWN_BITS         3
-#define AR9170_ERR_DATA_SIZE        4
-#define AR9170_ERR_TOTAL_LEN        5
-#define AR9170_ERR_DATA             6
-#define AR9170_ERR_SEQ              7
-#define AR9170_ERR_LEN              8
+#define AR9170_ERR_FS_BIT      1
+#define AR9170_ERR_LS_BIT      2
+#define AR9170_ERR_OWN_BITS    3
+#define AR9170_ERR_DATA_SIZE   4
+#define AR9170_ERR_TOTAL_LEN   5
+#define AR9170_ERR_DATA                6
+#define AR9170_ERR_SEQ         7
+#define AR9170_ERR_LEN         8
 
 /* Status bits definitions */
 /* Own bits definitions */
-#define AR9170_OWN_BITS_MASK        0x3
-#define AR9170_OWN_BITS_SW          0x0
-#define AR9170_OWN_BITS_HW          0x1
-#define AR9170_OWN_BITS_SE          0x2
+#define AR9170_OWN_BITS                0x3
+#define AR9170_OWN_BITS_S      0
+#define AR9170_OWN_BITS_SW     0x0
+#define AR9170_OWN_BITS_HW     0x1
+#define AR9170_OWN_BITS_SE     0x2
 
 /* Control bits definitions */
 #define AR9170_CTRL_TXFAIL     1
 #define AR9170_CTRL_BAFAIL     2
-#define AR9170_CTRL_FAIL_MASK  (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL)
+#define AR9170_CTRL_FAIL       (AR9170_CTRL_TXFAIL | AR9170_CTRL_BAFAIL)
 
 /* First segament bit */
-#define AR9170_CTRL_LS_BIT               0x100
+#define AR9170_CTRL_LS_BIT     0x100
 /* Last segament bit */
-#define AR9170_CTRL_FS_BIT               0x200
+#define AR9170_CTRL_FS_BIT     0x200
 
 struct dma_queue {
        struct dma_desc *head;
@@ -240,7 +241,7 @@ static inline __inline struct dma_desc *dma_dequeue_bits(struct dma_queue *q,
 {
        struct dma_desc *desc = NULL;
 
-       if ((q->head->status & AR9170_OWN_BITS_MASK) == bits)
+       if ((q->head->status & AR9170_OWN_BITS) == bits)
                desc = dma_unlink_head(q);
 
        return desc;
@@ -252,7 +253,7 @@ static inline __inline struct dma_desc *dma_dequeue_not_bits(struct dma_queue *q
        struct dma_desc *desc = NULL;
 
        /* AR9170_OWN_BITS_HW will be filtered out here too. */
-       if ((q->head->status & AR9170_OWN_BITS_MASK) != bits)
+       if ((q->head->status & AR9170_OWN_BITS) != bits)
                desc = dma_unlink_head(q);
 
        return desc;
@@ -270,13 +271,13 @@ static inline __inline struct dma_desc *dma_dequeue_not_bits(struct dma_queue *q
 #define __for_each_desc_bits(desc, queue, bits)                                \
        for (desc = (queue)->head;                                      \
             (desc != (queue)->terminator &&                            \
-            (desc->status & AR9170_OWN_BITS_MASK) == bits);            \
+            (desc->status & AR9170_OWN_BITS) == bits);                 \
             desc = desc->lastAddr->nextAddr)
 
 #define __while_desc_bits(desc, queue, bits)                           \
        for (desc = (queue)->head;                                      \
             (!queue_empty(queue) &&                                    \
-            (desc->status & AR9170_OWN_BITS_MASK) == bits);            \
+            (desc->status & AR9170_OWN_BITS) == bits);                 \
             desc = (queue)->head)
 
 #define __for_each_desc(desc, queue)                                   \
@@ -311,7 +312,7 @@ static inline __inline unsigned int queue_len(struct dma_queue *q)
 static inline __inline void dma_rearm(struct dma_desc *desc)
 {
        /* Set OWN bit to HW */
-       desc->status = ((desc->status & (~AR9170_OWN_BITS_MASK)) |
+       desc->status = ((desc->status & (~AR9170_OWN_BITS)) |
                        AR9170_OWN_BITS_HW);
 }
 
index 178679a6f9f12f23a22b7cbddf10f4ab61a1db4f..47dda502bcd7a60ec912d79143327359096a6fc5 100644 (file)
@@ -97,7 +97,7 @@ static inline __inline uint8_t ar9170_get_rx_macstatus_error(struct dma_desc *de
 static inline __inline struct ieee80211_hdr *ar9170_get_rx_i3e(struct dma_desc *desc)
 {
        if (!((ar9170_get_rx_macstatus_status(desc) &
-               AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) {
+               AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) {
                return (void *)(DESC_PAYLOAD_OFF(desc,
                        offsetof(struct ar9170_rx_frame_head, i3e)));
        } else {
@@ -109,7 +109,7 @@ static inline __inline struct ieee80211_hdr *ar9170_get_rx_i3e(struct dma_desc *
 static inline __inline struct ar9170_rx_head *ar9170_get_rx_head(struct dma_desc *desc)
 {
        if (!((ar9170_get_rx_macstatus_status(desc) &
-               AR9170_RX_STATUS_MPDU_MASK) & AR9170_RX_STATUS_MPDU_LAST)) {
+               AR9170_RX_STATUS_MPDU) & AR9170_RX_STATUS_MPDU_LAST)) {
                return (void *)((uint8_t *)DESC_PAYLOAD(desc) +
                        offsetof(struct ar9170_rx_frame_head, phy_head));
        } else {
@@ -131,7 +131,7 @@ static inline __inline uint32_t ar9170_rx_to_phy(struct dma_desc *rx)
 
        mac_status = ar9170_get_rx_macstatus_status(rx);
 
-       phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION_MASK;
+       phy.modulation = mac_status & AR9170_RX_STATUS_MODULATION;
        phy.chains = AR9170_TX_PHY_TXCHAIN_1;
 
        switch (phy.modulation) {
@@ -190,7 +190,7 @@ static inline __inline unsigned int ar9170_get_rx_mpdu_len(struct dma_desc *desc
 
        mpdu_len -= sizeof(struct ar9170_rx_macstatus);
 
-       switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU_MASK) {
+       switch (ar9170_get_rx_macstatus_status(desc) & AR9170_RX_STATUS_MPDU) {
        case AR9170_RX_STATUS_MPDU_LAST:
                mpdu_len -= sizeof(struct ar9170_rx_phystatus);
                break;
index 3da9f8c328c1de3cbd66c478f764bfcc43fb38b9..28960326f2f1c742358d9510a101fd1bfaf56849 100644 (file)
@@ -192,7 +192,7 @@ void dma_reclaim(struct dma_queue *q, struct dma_desc *desc)
        desc->status = AR9170_OWN_BITS_SW;
 
        /* 5. Copy TTD to last TD */
-       tdesc.status &= (~AR9170_OWN_BITS_MASK);
+       tdesc.status &= (~AR9170_OWN_BITS);
        copy_dma_desc((void *)q->terminator, (void *)&tdesc);
        q->terminator->status |= AR9170_OWN_BITS_HW;
 
@@ -253,7 +253,7 @@ void dma_put(struct dma_queue *q, struct dma_desc *desc)
        desc->dataAddr = NULL;
 
        /* 5. Copy TTD to last TD */
-       tdesc.status &= (~AR9170_OWN_BITS_MASK);
+       tdesc.status &= (~AR9170_OWN_BITS);
        copy_dma_desc((void *)q->terminator, (void *)&tdesc);
        q->terminator->status |= AR9170_OWN_BITS_HW;
 
index 6278b58486e570aa6570fb4e20ccd251c56f264c..1f4afa3b618d147a7a7b9b493f85a86b5ae60a4c 100644 (file)
@@ -290,7 +290,7 @@ static bool wlan_tx_status(struct dma_queue *queue,
 
        success = true;
 
-       if (!!(desc->ctrl & AR9170_CTRL_FAIL_MASK)) {
+       if (!!(desc->ctrl & AR9170_CTRL_FAIL)) {
                txfail = !!(desc->ctrl & AR9170_CTRL_TXFAIL);
 
                /* reset retry indicator flags */
index 49fdb2f71a731ec25c0561e6ffe333b4b4be9898..c1879f5815f6bfff2f330fa75e7c45422db4a192 100644 (file)
@@ -185,11 +185,12 @@ struct carl9170_cmd {
        } __packed;
 } __packed;
 
-#define        CARL9170_TX_STATUS_QUEUE_MASK   3
-#define        CARL9170_TX_STATUS_RIX_SHIFT    2
-#define        CARL9170_TX_STATUS_RIX_MASK     (3 << CARL9170_TX_STATUS_RIX_SHIFT)
-#define        CARL9170_TX_STATUS_TRIES_SHIFT  4
-#define        CARL9170_TX_STATUS_TRIES_MASK   (7 << CARL9170_TX_STATUS_TRIES_SHIFT)
+#define        CARL9170_TX_STATUS_QUEUE        3
+#define        CARL9170_TX_STATUS_QUEUE_S      0
+#define        CARL9170_TX_STATUS_RIX_S        2
+#define        CARL9170_TX_STATUS_RIX          (3 << CARL9170_TX_STATUS_RIX_S)
+#define        CARL9170_TX_STATUS_TRIES_S      4
+#define        CARL9170_TX_STATUS_TRIES        (7 << CARL9170_TX_STATUS_TRIES_S)
 #define        CARL9170_TX_STATUS_SUCCESS      0x80
 
 /*
index 1fd3ab1e6baa1b6ae75374038a291452dac98352..f859d89ffd0b05d62c131577550820d81ef97eee 100644 (file)
@@ -56,7 +56,8 @@
 
 #define        AR9170_RX_ENC_SOFTWARE                  0x8
 
-#define        AR9170_RX_STATUS_MODULATION_MASK        0x03
+#define        AR9170_RX_STATUS_MODULATION             0x03
+#define        AR9170_RX_STATUS_MODULATION_S           0
 #define        AR9170_RX_STATUS_MODULATION_CCK         0x00
 #define        AR9170_RX_STATUS_MODULATION_OFDM        0x01
 #define        AR9170_RX_STATUS_MODULATION_HT          0x02
@@ -66,7 +67,8 @@
 #define        AR9170_RX_STATUS_SHORT_PREAMBLE         0x08
 #define        AR9170_RX_STATUS_GREENFIELD             0x08
 
-#define        AR9170_RX_STATUS_MPDU_MASK              0x30
+#define        AR9170_RX_STATUS_MPDU                   0x30
+#define        AR9170_RX_STATUS_MPDU_S                 4
 #define        AR9170_RX_STATUS_MPDU_SINGLE            0x00
 #define        AR9170_RX_STATUS_MPDU_FIRST             0x20
 #define        AR9170_RX_STATUS_MPDU_MIDDLE            0x30