X-Git-Url: https://jxself.org/git/?p=carl9170fw.git;a=blobdiff_plain;f=include%2Fshared%2Fwlan.h;h=5127c3a9a2cf10fd2bc37cf290dc0032b7df8611;hp=c882ede0a3c9956dffb893a6c0a07245bb5db1c0;hb=a4cf4c3aa345a046f8f4d3d1eb66edb590b62554;hpb=e72388a0aa23da8bc8e24a0cbe9d523c5a9ce294

diff --git a/include/shared/wlan.h b/include/shared/wlan.h
index c882ede..5127c3a 100644
--- a/include/shared/wlan.h
+++ b/include/shared/wlan.h
@@ -56,7 +56,8 @@
 
 #define	AR9170_RX_ENC_SOFTWARE			0x8
 
-#define	AR9170_RX_STATUS_MODULATION_MASK	0x03
+#define	AR9170_RX_STATUS_MODULATION		0x03
+#define	AR9170_RX_STATUS_MODULATION_S		0
 #define	AR9170_RX_STATUS_MODULATION_CCK		0x00
 #define	AR9170_RX_STATUS_MODULATION_OFDM	0x01
 #define	AR9170_RX_STATUS_MODULATION_HT		0x02
@@ -66,7 +67,8 @@
 #define	AR9170_RX_STATUS_SHORT_PREAMBLE		0x08
 #define	AR9170_RX_STATUS_GREENFIELD		0x08
 
-#define	AR9170_RX_STATUS_MPDU_MASK		0x30
+#define	AR9170_RX_STATUS_MPDU			0x30
+#define	AR9170_RX_STATUS_MPDU_S			4
 #define	AR9170_RX_STATUS_MPDU_SINGLE		0x00
 #define	AR9170_RX_STATUS_MPDU_FIRST		0x20
 #define	AR9170_RX_STATUS_MPDU_MIDDLE		0x30
@@ -84,7 +86,7 @@
 /* these are either-or */
 #define	AR9170_TX_MAC_PROT_RTS			0x0001
 #define	AR9170_TX_MAC_PROT_CTS			0x0002
-#define	AR9170_TX_MAC_PROT_MASK			0x0003
+#define	AR9170_TX_MAC_PROT			0x0003
 
 #define	AR9170_TX_MAC_NO_ACK			0x0004
 /* if unset, MAC will only do SIFS space before frame */
@@ -115,26 +117,30 @@
 #define	AR9170_TX_PHY_SHORT_PREAMBLE		0x00000004
 #define	AR9170_TX_PHY_GREENFIELD		0x00000004
 
-#define	AR9170_TX_PHY_BW_SHIFT			3
-#define	AR9170_TX_PHY_BW_MASK			(3 << AR9170_TX_PHY_BW_SHIFT)
+#define	AR9170_TX_PHY_BW_S			3
+#define	AR9170_TX_PHY_BW			(3 << AR9170_TX_PHY_BW_SHIFT)
 #define	AR9170_TX_PHY_BW_20MHZ			0
 #define	AR9170_TX_PHY_BW_40MHZ			2
 #define	AR9170_TX_PHY_BW_40MHZ_DUP		3
 
-#define	AR9170_TX_PHY_TX_HEAVY_CLIP_SHIFT	6
-#define	AR9170_TX_PHY_TX_HEAVY_CLIP_MASK	(7 << AR9170_TX_PHY_TX_HEAVY_CLIP_SHIFT)
+#define	AR9170_TX_PHY_TX_HEAVY_CLIP_S		6
+#define	AR9170_TX_PHY_TX_HEAVY_CLIP		(7 << \
+						 AR9170_TX_PHY_TX_HEAVY_CLIP_S)
 
-#define	AR9170_TX_PHY_TX_PWR_SHIFT		9
-#define	AR9170_TX_PHY_TX_PWR_MASK		(0x3f << AR9170_TX_PHY_TX_PWR_SHIFT)
+#define	AR9170_TX_PHY_TX_PWR_S			9
+#define	AR9170_TX_PHY_TX_PWR			(0x3f << \
+						 AR9170_TX_PHY_TX_PWR_S)
 
-#define	AR9170_TX_PHY_TXCHAIN_SHIFT		15
-#define	AR9170_TX_PHY_TXCHAIN_MASK		(7 << AR9170_TX_PHY_TXCHAIN_SHIFT)
+#define	AR9170_TX_PHY_TXCHAIN_S			15
+#define	AR9170_TX_PHY_TXCHAIN			(7 << \
+						 AR9170_TX_PHY_TXCHAIN_S)
 #define	AR9170_TX_PHY_TXCHAIN_1			1
 /* use for cck, ofdm 6/9/12/18/24 and HT if capable */
 #define	AR9170_TX_PHY_TXCHAIN_2			5
 
-#define	AR9170_TX_PHY_MCS_SHIFT			18
-#define	AR9170_TX_PHY_MCS_MASK			(0x7f << AR9170_TX_PHY_MCS_SHIFT)
+#define	AR9170_TX_PHY_MCS_S			18
+#define	AR9170_TX_PHY_MCS			(0x7f << \
+						 AR9170_TX_PHY_MCS_S)
 
 #define	AR9170_TX_PHY_RATE_CCK_1M		0x0
 #define	AR9170_TX_PHY_RATE_CCK_2M		0x1
@@ -225,6 +231,13 @@ struct ar9170_tx_hw_phy_control {
 	} __packed;
 } __packed;
 
+struct ar9170_tx_rate_info {
+	u8 tries:3;
+	u8 erp_prot:2;
+	u8 ampdu:1;
+	u8 free:2; /* free for use (e.g.:RIFS/TXOP/AMPDU) */
+} __packed;
+
 struct carl9170_tx_superdesc {
 	__le16 len;
 	u8 rix;
@@ -235,12 +248,13 @@ struct carl9170_tx_superdesc {
 	u8 ampdu_commit_density:1;
 	u8 ampdu_commit_factor:1;
 	u8 ampdu_unused_bit:1;
-	u8 queue:3;
+	u8 queue:2;
+	u8 reserved:1;
 	u8 vif_id:3;
 	u8 fill_in_tsf:1;
 	u8 cab:1;
 	u8 padding2;
-	u8 tries[CARL9170_TX_MAX_RATES];
+	struct ar9170_tx_rate_info ri[CARL9170_TX_MAX_RATES];
 	struct ar9170_tx_hw_phy_control rr[CARL9170_TX_MAX_RETRY_RATES];
 } __packed;
 
@@ -281,13 +295,20 @@ struct _ar9170_tx_hwdesc {
 #define	CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR		0x40
 #define	CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR_S		6
 
-#define CARL9170_TX_SUPER_MISC_QUEUE			0x7
+#define CARL9170_TX_SUPER_MISC_QUEUE			0x3
 #define CARL9170_TX_SUPER_MISC_QUEUE_S			0
 #define	CARL9170_TX_SUPER_MISC_VIF_ID			0x38
 #define	CARL9170_TX_SUPER_MISC_VIF_ID_S			3
 #define	CARL9170_TX_SUPER_MISC_FILL_IN_TSF		0x40
 #define	CARL9170_TX_SUPER_MISC_CAB			0x80
 
+#define CARL9170_TX_SUPER_RI_TRIES			0x7
+#define CARL9170_TX_SUPER_RI_TRIES_S			0
+#define CARL9170_TX_SUPER_RI_ERP_PROT			0x18
+#define CARL9170_TX_SUPER_RI_ERP_PROT_S			3
+#define CARL9170_TX_SUPER_RI_AMPDU			0x20
+#define CARL9170_TX_SUPER_RI_AMPDU_S			5
+
 struct _carl9170_tx_superdesc {
 	__le16 len;
 	u8 rix;
@@ -296,7 +317,7 @@ struct _carl9170_tx_superdesc {
 	u8 ampdu_settings;
 	u8 misc;
 	u8 padding;
-	u8 tries[CARL9170_TX_MAX_RATES];
+	u8 ri[CARL9170_TX_MAX_RATES];
 	__le32 rr[CARL9170_TX_MAX_RETRY_RATES];
 } __packed;
 
@@ -382,8 +403,6 @@ enum ar9170_txq {
 	AR9170_TXQ_BK,
 
 	__AR9170_NUM_TXQ,
-
-	AR9170_TXQ_MGMT = 4,
 };
 
 static const u8 ar9170_qmap[__AR9170_NUM_TXQ] = { 2, 1, 0, 3 };