X-Git-Url: https://jxself.org/git/?p=carl9170fw.git;a=blobdiff_plain;f=carlfw%2Fsrc%2Frf.c;h=8bf34ea5e0aac3be7c4c7355b42c3abd9eb8057e;hp=7bcff275fc22232029322b294273ee74781eab94;hb=4401b7c39124120517162ec52da2006e0185b7a4;hpb=d4e37f3fb33cb7ec913f1e76f899196ffe158aa5

diff --git a/carlfw/src/rf.c b/carlfw/src/rf.c
index 7bcff27..8bf34ea 100644
--- a/carlfw/src/rf.c
+++ b/carlfw/src/rf.c
@@ -6,7 +6,7 @@
  * Copyright (c) 2000-2005 ZyDAS Technology Corporation
  * Copyright (c) 2007-2009 Atheros Communications, Inc.
  * Copyright	2009	Johannes Berg <johannes@sipsolutions.net>
- * Copyright 2009, 2010 Christian Lamparter <chunkeey@googlemail.com>
+ * Copyright 2009-2011	Christian Lamparter <chunkeey@googlemail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -181,10 +181,6 @@ static uint32_t rf_init(const uint32_t delta_slope_coeff_exp,
 		set(AR9170_PHY_REG_ANALOG_SWAP, AR9170_PHY_ANALOG_SWAP_AB |
 						AR9170_PHY_ANALOG_SWAP_ALT_CHAIN);
 
-		/* configure mask */
-		set(AR9170_PHY_REG_RX_CHAINMASK, 0x5);	/* chain 0 + chain 2 */
-		set(AR9170_PHY_REG_CAL_CHAINMASK, 0x5);	/* chain 0 + chain 2 */
-
 		/* Activate BB */
 		set(AR9170_PHY_REG_ACTIVE, AR9170_PHY_ACTIVE_EN);
 		delay(10);
@@ -203,10 +199,13 @@ void rf_cmd(const struct carl9170_cmd *cmd, struct carl9170_rsp *resp)
 	fw.phy.ht_settings = cmd->rf_init.ht_settings;
 	fw.phy.frequency = cmd->rf_init.freq;
 
+	/*
+	 * Is the clock controlled by the PHY?
+	 */
 	if ((fw.phy.ht_settings & EIGHTY_FLAG) == EIGHTY_FLAG)
-		clock_set(true, AHB_80_88MHZ);
+		clock_set(AHB_80_88MHZ, true);
 	else
-		clock_set(true, AHB_40_44MHZ);
+		clock_set(AHB_40_44MHZ, true);
 
 	ret = rf_init(le32_to_cpu(cmd->rf_init.delta_slope_coeff_exp),
 		      le32_to_cpu(cmd->rf_init.delta_slope_coeff_man),
@@ -219,15 +218,10 @@ void rf_cmd(const struct carl9170_cmd *cmd, struct carl9170_rsp *resp)
 	resp->rf_init_res.ret = cpu_to_le32(ret);
 }
 
-#ifdef CONFIG_CARL9170FW_PSM
 void rf_psm(void)
 {
 	u32 bank3;
 
-	/*
-	 * FIXME: Does not work on 5GHz band!
-	 */
-
 	if (fw.phy.psm.state == CARL9170_PSM_SOFTWARE) {
 		/* not enabled by the driver */
 		return;
@@ -248,7 +242,7 @@ void rf_psm(void)
 		/* Synthesizer off + RX off */
 		bank3 = 0x00400018;
 
-		clock_set(true, AHB_20_22MHZ);
+		clock_set(AHB_20_22MHZ, false);
 	} else {
 		/* advance to the next PSM step */
 		fw.phy.psm.state--;
@@ -266,19 +260,18 @@ void rf_psm(void)
 			bank3 = 0x01420098;
 
 			if ((fw.phy.ht_settings & EIGHTY_FLAG) == EIGHTY_FLAG)
-				clock_set(true, AHB_80_88MHZ);
+				clock_set(AHB_80_88MHZ, true);
 			else
-				clock_set(true, AHB_40_44MHZ);
+				clock_set(AHB_40_44MHZ, true);
 		} else {
 			return ;
 		}
 	}
 
-	if (fw.phy.frequency < 30000000)
+	if (fw.phy.frequency < 3000000)
 		bank3 |= 0x00800000;
 
 	set(0x1c58f0, bank3);
 }
-#endif /* CONFIG_CARL9170FW_PSM */
 
 #endif /* CONFIG_CARL9170FW_RADIO_FUNCTIONS */